INTEGRATED MICROELECTRONIC DEVICE WITH THROUGH-VIAS
    2.
    发明申请
    INTEGRATED MICROELECTRONIC DEVICE WITH THROUGH-VIAS 失效
    一体化微电子器件

    公开(公告)号:US20110140231A1

    公开(公告)日:2011-06-16

    申请号:US12961730

    申请日:2010-12-07

    Abstract: An integrated microelectronic device is formed from a substrate having a first side and a second side and including a doped active zone (2) in the first side of the substrate. A circuit component is situated in the doped active zone. A through silicon via extends between the second side and the first side, the via being electrically isolated from the substrate by an insulating layer. A buffer zone is situated between the insulating layer and the doped active zone. This buffer zone is positioned under a shallow trench isolation zone provided around the doped active zone. The buffer zone functions to reduce the electrical coupling between the through silicon via and the doped active zone.

    Abstract translation: 集成微电子器件由具有第一侧和第二侧的衬底形成,并且在衬底的第一侧包括掺杂的有源区(2)。 电路元件位于掺杂的有源区。 通孔硅通孔在第二侧和第一侧之间延伸,通孔由绝缘层与衬底电隔离。 缓冲区位于绝缘层和掺杂活性区之间。 该缓冲区位于设置在掺杂活性区周围的浅沟槽隔离区的下方。 缓冲区用于减少贯穿硅通孔和掺杂有源区之间的电耦合。

    Integrated microelectronic device with through-vias
    3.
    发明授权
    Integrated microelectronic device with through-vias 失效
    具有通孔的集成微电子器件

    公开(公告)号:US08410574B2

    公开(公告)日:2013-04-02

    申请号:US12961730

    申请日:2010-12-07

    Abstract: An integrated microelectronic device is formed from a substrate having a first side and a second side and including a doped active zone (2) in the first side of the substrate. A circuit component is situated in the doped active zone. A through silicon via extends between the second side and the first side, the via being electrically isolated from the substrate by an insulating layer. A buffer zone is situated between the insulating layer and the doped active zone. This buffer zone is positioned under a shallow trench isolation zone provided around the doped active zone. The buffer zone functions to reduce the electrical coupling between the through silicon via and the doped active zone.

    Abstract translation: 集成微电子器件由具有第一侧和第二侧的衬底形成,并且在衬底的第一侧包括掺杂的有源区(2)。 电路元件位于掺杂的有源区。 通孔硅通孔在第二侧和第一侧之间延伸,通孔由绝缘层与衬底电隔离。 缓冲区位于绝缘层和掺杂活性区之间。 该缓冲区位于设置在掺杂活性区周围的浅沟槽隔离区的下方。 缓冲区用于减少贯穿硅通孔和掺杂有源区之间的电耦合。

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