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公开(公告)号:US07902837B2
公开(公告)日:2011-03-08
申请号:US12320879
申请日:2009-02-06
Applicant: Maxime Rousseau , Bernard Viala
Inventor: Maxime Rousseau , Bernard Viala
CPC classification number: B81C3/004 , B81B2207/017 , B81C2201/019 , B81C2203/051 , H01L23/645 , H01L25/0657 , H01L25/50 , H01L2223/54426 , H01L2225/06593 , H01L2924/0002 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/00
Abstract: Substrates to be aligned include microcoils arranged at the level of their facing surfaces. In an alignment phase, power is supplied to at least the microcoils of the first substrate, whereas the inductance of the microcoils of the second substrate is measured. The microcoils are preferably flat microcoils in the form of a spiral or a serpentine.
Abstract translation: 待对准的基板包括布置在其相对表面的水平处的微线圈。 在对准阶段,向第一衬底的至少微线圈供电,而测量第二衬底的微线圈的电感。 微线圈优选为螺旋形或蛇形形式的平面微线圈。
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公开(公告)号:US20110140231A1
公开(公告)日:2011-06-16
申请号:US12961730
申请日:2010-12-07
Applicant: Alexis Farcy , Maxime Rousseau
Inventor: Alexis Farcy , Maxime Rousseau
CPC classification number: H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
Abstract: An integrated microelectronic device is formed from a substrate having a first side and a second side and including a doped active zone (2) in the first side of the substrate. A circuit component is situated in the doped active zone. A through silicon via extends between the second side and the first side, the via being electrically isolated from the substrate by an insulating layer. A buffer zone is situated between the insulating layer and the doped active zone. This buffer zone is positioned under a shallow trench isolation zone provided around the doped active zone. The buffer zone functions to reduce the electrical coupling between the through silicon via and the doped active zone.
Abstract translation: 集成微电子器件由具有第一侧和第二侧的衬底形成,并且在衬底的第一侧包括掺杂的有源区(2)。 电路元件位于掺杂的有源区。 通孔硅通孔在第二侧和第一侧之间延伸,通孔由绝缘层与衬底电隔离。 缓冲区位于绝缘层和掺杂活性区之间。 该缓冲区位于设置在掺杂活性区周围的浅沟槽隔离区的下方。 缓冲区用于减少贯穿硅通孔和掺杂有源区之间的电耦合。
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公开(公告)号:US08410574B2
公开(公告)日:2013-04-02
申请号:US12961730
申请日:2010-12-07
Applicant: Alexis Farcy , Maxime Rousseau
Inventor: Alexis Farcy , Maxime Rousseau
CPC classification number: H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
Abstract: An integrated microelectronic device is formed from a substrate having a first side and a second side and including a doped active zone (2) in the first side of the substrate. A circuit component is situated in the doped active zone. A through silicon via extends between the second side and the first side, the via being electrically isolated from the substrate by an insulating layer. A buffer zone is situated between the insulating layer and the doped active zone. This buffer zone is positioned under a shallow trench isolation zone provided around the doped active zone. The buffer zone functions to reduce the electrical coupling between the through silicon via and the doped active zone.
Abstract translation: 集成微电子器件由具有第一侧和第二侧的衬底形成,并且在衬底的第一侧包括掺杂的有源区(2)。 电路元件位于掺杂的有源区。 通孔硅通孔在第二侧和第一侧之间延伸,通孔由绝缘层与衬底电隔离。 缓冲区位于绝缘层和掺杂活性区之间。 该缓冲区位于设置在掺杂活性区周围的浅沟槽隔离区的下方。 缓冲区用于减少贯穿硅通孔和掺杂有源区之间的电耦合。
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公开(公告)号:US20090215207A1
公开(公告)日:2009-08-27
申请号:US12320879
申请日:2009-02-06
Applicant: Maxime Rousseau , Bernard Viala
Inventor: Maxime Rousseau , Bernard Viala
IPC: H01L21/66
CPC classification number: B81C3/004 , B81B2207/017 , B81C2201/019 , B81C2203/051 , H01L23/645 , H01L25/0657 , H01L25/50 , H01L2223/54426 , H01L2225/06593 , H01L2924/0002 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/00
Abstract: Substrates to be aligned comprise microcoils arranged at the level of their facing surfaces. In an alignment phase, power is supplied to at least the microcoils of the first substrate, whereas the inductance of the microcoils of the second substrate is measured. The microcoils are preferably flat microcoils in the form of a spiral or a serpentine.
Abstract translation: 待对准的基板包括布置在其相对表面的水平处的微线圈。 在对准阶段,向第一衬底的至少微线圈供电,而测量第二衬底的微线圈的电感。 微线圈优选为螺旋形或蛇形形式的平面微线圈。
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