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公开(公告)号：US09397662B2
公开(公告)日：2016-07-19
申请号：US13810609
申请日：2011-07-13
IPC分类号： H03K19/003 , G01R31/28 , G01R31/317 , H03K3/012 , H03K3/037
CPC分类号： H03K19/003 , G01R31/31725 , H03K3/012 , H03K3/0375
摘要： A sequential circuit with transition error detector including a sequential element with an input that is asserted to the output during the second clock phase of a two phase clock signal, a transition error detector coupled to the sequential element input to assert an error signal if a transition occurs at the sequential element input during the second clock phase but not to assert during the first clock phase, wherein a transition error detection circuit comprises a current mode circuit as a detection circuit for transition timing error detection from signals derived from the sequential element clock signal and input signals.
摘要翻译： 具有过渡误差检测器的顺序电路包括具有输入的顺序元件，该输入在两相时钟信号的第二时钟相位期间被输出到输出;转移误差检测器，耦合到顺序元件输入，以便在转换 在第二时钟相位期间在顺序元件输入处发生，而在第一时钟相位期间不进行断言，其中转换错误检测电路包括电流模式电路作为用于从顺序元件时钟信号导出的信号进行转换定时误差检测的检测电路 和输入信号。
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公开(公告)号：US20130193999A1
公开(公告)日：2013-08-01
申请号：US13810609
申请日：2011-07-13
IPC分类号： H03K19/003
CPC分类号： H03K19/003 , G01R31/31725 , H03K3/012 , H03K3/0375
摘要： A sequential circuit with transition error detector including a sequential element with an input that is asserted to the output during the second clock phase of a two phase clock signal, a transition error detector coupled to the sequential element input to assert an error signal if a transition occurs at the sequential element input during the second clock phase but not to assert during the first clock phase, wherein a transition error detection circuit comprises a current mode circuit as a detection circuit for transition timing error detection from signals derived from the sequential element clock signal and input signals.
摘要翻译： 具有过渡误差检测器的顺序电路包括具有输入的顺序元件，该输入在两相时钟信号的第二时钟相位期间被输出到输出;转移误差检测器，耦合到顺序元件输入，以便在转换 在第二时钟相位期间在顺序元件输入处发生，而在第一时钟相位期间不进行断言，其中转换错误检测电路包括电流模式电路作为用于从顺序元件时钟信号导出的信号进行转换定时误差检测的检测电路 和输入信号。
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3.发明授权公开(公告)号：US09838019B2
公开(公告)日：2017-12-05
申请号：US13880399
申请日：2011-10-20
IPC分类号： H03K19/094 , H03K19/017
CPC分类号： H03K19/094 , H03K19/017 , H03K19/09436
摘要： A field effect transistor current mode differential logic circuit comprising load transistors for converting the current output of each differential leg current to voltage output, and means for configuring the bulk of each differential leg's load transistor to be connected to the drain of the load transistor for use the logic circuit in Subthreshold Source Coupled Logic (STSCL) mode, and means for configuring the bulk of each leg load transistor to be connected to a voltage or to source of the same transistor for use in MOS current more logic (MCML) operation.
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4.发明申请Field effect transistor current mode logic with changeable bulk configuration of load transistors 有权场效应晶体管电流模式逻辑与负载晶体管的体积配置可变公开(公告)号：US20130207690A1
公开(公告)日：2013-08-15
申请号：US13880399
申请日：2011-10-20
IPC分类号： H03K19/094
CPC分类号： H03K19/094 , H03K19/017 , H03K19/09436
摘要： A field effect transistor current mode differential logic circuit comprising load transistors for converting the current output of each differential leg current to voltage output, and means for configuring the bulk of each differential leg's load transistor to be connected to the drain of the load transistor for use the logic circuit in Subthreshold Source Coupled Logic (STSCL) mode, and means for configuring the bulk of each leg load transistor to be connected to a voltage or to source of the same transistor for use in MOS current more logic (MCML) operation.
摘要翻译： 一种场效应晶体管电流模式差分逻辑电路，包括用于将每个差分支路电流的电流输出转换为电压输出的负载晶体管，以及用于将每个差分支路负载晶体管的体积配置为连接到负载晶体管的漏极用于使用的装置 亚阈值源耦合逻辑（STSCL）模式中的逻辑电路，以及用于将每个支路负载晶体管的体积配置为连接到用于MOS电流更多逻辑（MCML）操作的同一晶体管的电压或源极的装置。
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