公开(公告)号：US20130176700A1

公开(公告)日：2013-07-11

申请号：US13735862

申请日：2013-01-07

Applicant: Blake Stevens ,  Max Sorenson ,  Alan Rae ,  Marc Chason

Inventor： Blake Stevens ,  Max Sorenson ,  Alan Rae ,  Marc Chason

IPC: H05K1/18 ,  H05K13/00

CPC classification number: H05K3/284 ,  H01L2224/16225 ,  H05K1/185 ,  H05K13/00 ,  H05K2201/09872 ,  Y10T29/49002 ,  Y10T29/49117

Abstract: A moisture-resistant electronic device includes at least one electronic component at least partially covered by a moisture-resistant coating. The moisture-resistant coating may be located within an interior of the electronic device. The moisture-resistant coating may cover only portions of a boundary of an internal space within the electronic device. A moisture-resistant-coating may include one or more discernible boundaries, or seams, which may be located at or adjacent to locations where two or more components of the electronic device interface with each other. Assembly methods are also disclosed.

Abstract translation: 防潮电子设备包括至少一部分至少部分被防潮涂层覆盖的电子部件。 防潮涂层可以位于电子设备的内部。 防潮涂层可以仅覆盖电子设备内的内部空间的边界的一部分。 防潮涂层可以包括一个或多个可辨别的边界或接缝，其可以位于电子设备的两个或更多个部件彼此接合的位置处或邻近位置处。 还公开了装配方法。

公开(公告)号：US20070247824A1

公开(公告)日：2007-10-25

申请号：US11379751

申请日：2006-04-21

Applicant: Paul Brazis ,  Marc Chason ,  Daniel Gamota ,  Krishna Kalyanasundaram

Inventor： Paul Brazis ,  Marc Chason ,  Daniel Gamota ,  Krishna Kalyanasundaram

IPC: H05K1/14 ,  H05K1/11

CPC classification number: H05K1/147 ,  H05K1/118 ,  H05K1/144 ,  H05K3/361 ,  H05K3/363 ,  H05K2201/041 ,  H05K2201/10189 ,  H05K2201/10674 ,  H05K2203/1572

Abstract: An electronic apparatus, includes a plurality of electronic modules, each having a maximum thickness of no more than 90 microns, each comprising a substrate having a two sided edge connection pattern. The electronic modules are arranged adjacent to each other. Each pad of a first set of connection pads on a first electronic module is conductively connected to an opposing pad of a second set of connection pads of a second electronic module. The first set of connection pads is separated from the second set of connection pads by electrically conductive material that is less than 15 microns thick.

Abstract translation: 一种电子设备，包括多个电子模块，每个电子模块的最大厚度不超过90微米，每个电子模块包括具有双面边缘连接图案的基板。 电子模块彼此相邻布置。 第一电子模块上的第一组连接焊盘的每个焊盘导电地连接到第二电子模块的第二组连接焊盘的相对焊盘。 第一组连接焊盘通过小于15微米厚的导电材料与第二组连接焊盘分开。

公开(公告)号：US20070171154A1

公开(公告)日：2007-07-26

申请号：US11275689

申请日：2006-01-24

Applicant: Timothy Collins ,  Marc Chason ,  Krishna Kalyanasundaram

Inventor： Timothy Collins ,  Marc Chason ,  Krishna Kalyanasundaram

IPC: G09G3/30

CPC classification number: G09F13/22 ,  H04N13/395

Abstract: An apparatus includes a top plate [245] of a first transparent conductive material, a middle plate [225] of a second transparent conductive material, and a bottom plate [205] of conductive material. At least one upper dielectric layer [240] is disposed between the top plate [245] and the middle plate [225], and at least one lower dielectric layer [215] disposed between the bottom plate [205] and the middle plate [225]. A first electroluminescent layer [235] is disposed between the top plate [245] and the middle plate [225]. The first electroluminescent layer [235] has a first predetermined pattern. A second electroluminescent layer [215] is disposed between the middle plate [225] and the bottom plate [205]. The second electroluminescent layer [215] has a second predetermined pattern. The first electroluminescent layer [235] and the second electroluminescent layer [215] are powered by at least one alternating current (AC) power source to selectively display a simulated motion.

Abstract translation: 一种装置包括第一透明导电材料的顶板[245]，第二透明导电材料的中间板[225]和导电材料的底板[205]。 至少一个上电介质层[240]设置在顶板[245]和中间板[225]之间，并且至少一个下介电层[215]设置在底板[205]和中间板[225 ]。 第一电致发光层[235]设置在顶板[245]和中间板[225]之间。 第一电致发光层235具有第一预定图案。 第二电致发光层[215]设置在中间板[225]和底板[205]之间。 第二电致发光层215具有第二预定图案。 第一电致发光层[235]和第二电致发光层（215）由至少一个交流电（AC）电源供电，以选择性地显示模拟运动。

公开(公告)号：US20140199359A1

公开(公告)日：2014-07-17

申请号：US13833689

申请日：2013-03-15

Applicant: MARC CHASON ,  DANIEL ROMAN GAMOTA ,  RICK LATELLA

Inventor： MARC CHASON ,  DANIEL ROMAN GAMOTA ,  RICK LATELLA

IPC: A01N55/02

CPC classification number: A01N55/02 ,  A01N37/02 ,  A01N59/16 ,  A01N59/20 ,  A01N25/10

Abstract: Described are antimicrobial polymer products made from mixtures of antimicrobial organometallic additives dispersed throughout a polymer host matrix.

Abstract translation: 描述的是由分散在聚合物主体基质中的抗微生物有机金属添加剂的混合物制成的抗微生物聚合物产品。

公开(公告)号：US20070108897A1

公开(公告)日：2007-05-17

申请号：US11273929

申请日：2005-11-15

Applicant: Krishna Jonnalagadda ,  Marc Chason

Inventor： Krishna Jonnalagadda ,  Marc Chason

IPC: H01J1/62 ,  H01J63/04

CPC classification number: H05B33/26 ,  H01L51/5237

Abstract: An electroluminescent display device contains an electroluminescent phosphor sandwiched between a pair of electrodes. An optically transmissive layer of an electrically conductive material is coated on a side of the device that is presented to a human observer to aid in the prevention of electric shock. The electrically conductive material layer is electrically connected to ground, such as the ground of an AC power supply for the device.

Abstract translation: 电致发光显示装置包含夹在一对电极之间的电致发光荧光体。 导电材料的光学透射层涂覆在装置的一侧，其呈现给人类观察者以有助于防止电击。 导电材料层电连接到地面，例如用于装置的交流电源的接地。

公开(公告)号：US09138000B2

公开(公告)日：2015-09-22

申请号：US13833689

申请日：2013-03-15

Applicant: Marc Chason ,  Daniel Roman Gamota ,  Rick Latella

Inventor： Marc Chason ,  Daniel Roman Gamota ,  Rick Latella

IPC: A01N55/02 ,  A01N37/02 ,  A01N59/16 ,  A01N59/20

CPC classification number: A01N55/02 ,  A01N37/02 ,  A01N59/16 ,  A01N59/20 ,  A01N25/10

Abstract: Described are antimicrobial polymer products made from mixtures of antimicrobial organometallic additives dispersed throughout a polymer host matrix.

Abstract translation: 描述了由分散在聚合物主体基质中的抗微生物有机金属添加剂的混合物制成的抗微生物聚合物产品。

公开(公告)号：US07161227B2

公开(公告)日：2007-01-09

申请号：US10878414

申请日：2004-06-29

Applicant: Robert Lempkowski ,  Marc Chason

Inventor： Robert Lempkowski ,  Marc Chason

IPC: H01L29/00

CPC classification number: H01L21/8221 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/0688 ,  H01L27/15 ,  H01L29/812 ,  H01L2924/00011 ,  H01S5/021 ,  H01S5/0218 ,  H01S5/0261 ,  H01S5/183 ,  H01S2301/173 ,  H01L2224/80001

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. A high quality layer of compound semiconductor material is used to form a source component and a receiver component that are interconnected with an antenna and each other within a semiconductor structure that can detect a parameter, such as the speed, of an object.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外，顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。 使用高质量的化合物半导体材料层来形成源天线组件和接收器组件，该组件和接收器组件可以在半导体结构内互相连接，该半导体结构可以检测物体的诸如速度的参数。

公开(公告)号：US06780733B2

公开(公告)日：2004-08-24

申请号：US10236619

申请日：2002-09-06

Applicant: Marc Chason ,  Paul Brazis ,  Krishna Kalyanasundaram ,  Daniel Gamota

Inventor： Marc Chason ,  Paul Brazis ,  Krishna Kalyanasundaram ,  Daniel Gamota

IPC: H01L21301

CPC classification number: H01L21/6836 ,  H01L21/78 ,  H01L23/5387 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01049 ,  H01L2924/01058 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A wafer (10) having integrated circuit elements formed therein is thinned and a first carrier (41) is adhered thereto. The first carrier (41) facilitates handling of the thinned wafer (30). A second carrier (51) is then adhered as well and the various integrated circuits are singulated to yield a plurality of thinned die (81). Once the thinned die is mounted to a desired substrate (91), the first carrier (41) is readily removed. In one embodiment, the first carrier (41) has an adhesive that becomes less adherent when exposed to a predetermined stimulus (such as a given temperature range or a given frequency range of photonic energy). Such thinned die (or modules containing such die) are readily amenable to stacking in order to achieve significantly increased circuit densities.

Abstract translation: 其中形成有集成电路元件的晶片（10）变薄，并且第一载体（41）粘附到其上。 第一载体（41）便于处理薄的晶片（30）。 然后粘合第二载体（51），并且将各种集成电路分离以产生多个薄的模具（81）。 一旦将薄的模具安装到期望的基板（91）上，则容易地移除第一载体（41）。 在一个实施例中，第一载体（41）具有当暴露于预定刺激（例如给定温度范围或给定的光子能量的给定频率范围）时变得较不粘附的粘合剂。 这种薄的模具（或包含这种模具的模块）易于堆叠以便实现显着增加的电路密度。

公开(公告)号：US06585424B2

公开(公告)日：2003-07-01

申请号：US09911472

申请日：2001-07-25

Applicant: Marc Chason ,  Daniel Gamota

Inventor： Marc Chason ,  Daniel Gamota

IPC: G02B636

CPC classification number: G02B6/4204

Abstract: High quality epitaxial layers of monocrystalline materials can be grown layered monocrystallinfe substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. Formation of a compliant substrate may include utilizing surfactant-enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. The layered monocrystalline substrates allow for the fabrication of at least one optical device with an insulating material laid over it, wherein the insulating material provides an optical aperture for use with the optical device. A conductive material can be deposited within the insulating material, and an electro-rheological lens can be inserted within the insulating material aperture, while being in contact with the conductive material.

Abstract translation: 通过形成用于生长单晶层的顺应性衬底，可以生长单晶材料的高质量外延层，以形成层叠的单晶衬底，例如大的硅晶片。 顺应性衬底的形成可以包括利用表面活性剂增强的外延，将单晶硅外延生长到单晶氧化物上，以及Zintl相材料的外延生长。 层状单晶衬底允许制造具有铺设在其上的绝缘材料的至少一个光学器件，其中绝缘材料提供用于光学器件的光学孔。 导电材料可以沉积在绝缘材料内，并且电流变透镜可以在与导电材料接触的同时插入绝缘材料孔内。

公开(公告)号：US5568353A

公开(公告)日：1996-10-22

申请号：US415976

申请日：1995-04-03

Applicant: Lijun Bai ,  Joseph G. Kincs ,  Marc Chason

Inventor： Lijun Bai ,  Joseph G. Kincs ,  Marc Chason

IPC: H01G9/00 ,  H01G9/155

CPC classification number: H01G9/155 ,  Y02E60/13

Abstract: An electrochemical charge storage device (60) having two asymmetric inorganic electrodes (30, 36) is provided. The device may be fabricated using a bipolar plate which acts as both the conductor, and as the substrate upon which the active electrodes are formed. The bipolar plate may further be adapted to act as one of the active electrodes by activating a portion of the bipolar plate material.

Abstract translation: 提供具有两个不对称无机电极（30,36）的电化学电荷存储装置（60）。 该器件可以使用双极板来制造，该双极板充当导体，并且作为形成有源电极的基板。 双极板还可以通过激活双极板材料的一部分而适于作为有源电极之一起作用。