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    Thin film transistor array panel for a liquid crystal display having a wide viewing angle and a method for manufacturing the same
    2.
    发明授权
    Thin film transistor array panel for a liquid crystal display having a wide viewing angle and a method for manufacturing the same 有权
    具有宽视角的液晶显示器的薄膜晶体管阵列面板及其制造方法

    公开(公告)号：US06335211B1

    公开(公告)日：2002-01-01

    申请号：US09521179

    申请日：2000-03-08

    申请人： Kyung-Nam Lee

    发明人： Kyung-Nam Lee

    IPC分类号： H01L2100

    CPC分类号： G02F1/136227 ,  G02F1/134336 ,  G02F1/136213 ,  G02F2001/13629

    摘要： A gate wire including a gate line, a gate electrode and a gate pad, and a storage wire including a storage line and a storage electrode are formed on an insulating substrate. A gate insulating layer pattern, a semiconductor pattern made of amorphous silicon, and an ohmic contact layer pattern made of a doped amorphous silicon are patterned to have a shape covering the gate wire and the storage wire. Next, a transparent conductive layer made of ITO is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad. A lower layer made of chromium having good contact properties with ITO and an upper layer made of either aluminum or aluminum alloy having low resistivity are sequentially deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode and a data pad. Next, the ohmic contact layer, which is not covered by the data wire, is etched. After forming the data wire, a passivation layer is formed and patterned to form contact holes respectively exposing the redundant gate pad and the redundant data pad, and an opening exposing the pixel electrode. To prevent the interference of image signals applied to adjacent data lines, the semiconductor pattern exposed through the opening of the passivation layer is removed. According to the present invention, because the pixel electrode of ITO is formed before forming the data wire, and the data wire has a double-layered structure including the lower layer of material having good contact properties with ITO and including also the upper layer of material having a low resistivity, wire damage and wire severance problems are prevented.

    摘要翻译： 在绝缘基板上形成包括栅极线，栅电极和栅极焊盘的栅极线以及包括存储线和存储电极的存储线。 栅极绝缘层图案，由非晶硅制成的半导体图案以及由掺杂的非晶硅制成的欧姆接触层图案被图案化以具有覆盖栅极线和存储线的形状。 接下来，将由ITO制成的透明导电层沉积并图案化以形成像素电极，冗余栅极焊盘和冗余数据焊盘。 依次沉积和图案化由ITO制成的下层与ITO和具有低电阻率的铝或铝合金制成的上层的接触性良好的下层，形成包括数据线，源电极，漏极和 数据垫。 接下来，蚀刻不被数据线覆盖的欧姆接触层。 在形成数据线之后，形成钝化层并构图以形成分别暴露冗余栅极焊盘和冗余数据焊盘的接触孔以及暴露像素电极的开口。 为了防止施加到相邻数据线的图像信号的干扰，通过钝化层的开口暴露的半导体图案被去除。 根据本发明，由于在形成数据线之前形成ITO的像素电极，并且数据线具有包括与ITO具有良好接触性的下层材料的双层结构，并且还包括上层材料 具有低电阻率，防止了线损和断线问题。