公开(公告)号：US08259276B2

公开(公告)日：2012-09-04

申请号：US12368972

申请日：2009-02-10

申请人： Kuei-Sheng Tseng ,  Hsiang-Pin Fan ,  Ming-Chang Shih

发明人： Kuei-Sheng Tseng ,  Hsiang-Pin Fan ,  Ming-Chang Shih

IPC分类号： G02F1/1345 ,  G09G3/36

CPC分类号： G02F1/1345

摘要： An active device array substrate includes a substrate, a pixel array, a peripheral circuit, and a number of marks. The substrate has an active area and a peripheral circuit area that is connected to the active area. The pixel array is disposed on the active area of the substrate. The peripheral circuit is disposed on the peripheral circuit area of the substrate. Besides, the peripheral circuit includes a number of driver bonding pads, a number of fan-out lines, and a number of connecting lines. The fan-out lines are electrically connected to the pixel array. Each of the connecting lines connects one of the driver bonding pads and one of the fan-out lines. Additionally, the connecting lines are arranged in different pitches. Each of the marks is disposed between two adjacent connecting lines.

摘要翻译： 有源器件阵列衬底包括衬底，像素阵列，外围电路和多个标记。 衬底具有连接到有源区的有源区和外围电路区。 像素阵列设置在衬底的有源区上。 外围电路设置在基板的外围电路区域上。 此外，外围电路包括多个驱动器接合焊盘，多个扇出线和多个连接线。 扇出线电连接到像素阵列。 每个连接线连接一个驱动器接合焊盘和一个扇出线。 另外，连接线以不同的间距布置。 每个标记设置在两个相邻的连接线之间。

公开(公告)号：US08098791B2

公开(公告)日：2012-01-17

申请号：US12789622

申请日：2010-05-28

申请人： Shih-Chyn Lin ,  Hsiang-Pin Fan ,  Wen-Pin Chen ,  Kuei-Sheng Tseng ,  Chen-Yi Wu

发明人： Shih-Chyn Lin ,  Hsiang-Pin Fan ,  Wen-Pin Chen ,  Kuei-Sheng Tseng ,  Chen-Yi Wu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0286

摘要： A shift register includes a control circuit, a pull-up circuit and a pull-down circuit. The control circuit generates a control signal according to a start pulse signal during being enabled. The pull-up circuit produces a gate pulse signal according to a clock signal during being enabled by the control signal. The pull-up circuit includes a dual-gate transistor. A first gate of the dual-gate transistor is electrically coupled to the control signal, a second gate of the dual-gate transistor is electrically coupled to a predetermined voltage, the source/drain of the dual-gate transistor serves as an output terminal for the gate pulse signal, and the drain/source of the dual-gate transistor is electrically coupled to the clock signal. The pull-down circuit pulls a potential at the first gate and another potential at the output terminal down to a power supply potential during the pull-up circuit is disabled.

摘要翻译： 移位寄存器包括控制电路，上拉电路和下拉电路。 控制电路在启用期间根据起始脉冲信号产生控制信号。 上拉电路在由控制信号启用期间根据时钟信号产生门脉冲信号。 上拉电路包括双栅极晶体管。 双栅极晶体管的第一栅极电耦合到控制信号，双栅极晶体管的第二栅极电耦合到预定电压，双栅极晶体管的源极/漏极用作输出端 门脉冲信号和双栅极晶体管的漏极/源极电耦合到时钟信号。 下拉电路在第一个栅极处引起电位，而在上拉电路期间，输出端子处的另一个电位下降到电源电位。

公开(公告)号：US20090261339A1

公开(公告)日：2009-10-22

申请号：US12206746

申请日：2008-09-09

申请人： Tung-Chang Tsai ,  Lee-Hsun Chang ,  Ming-Chang Shih ,  Jing-Ru Chen ,  Kuei-Sheng Tseng

发明人： Tung-Chang Tsai ,  Lee-Hsun Chang ,  Ming-Chang Shih ,  Jing-Ru Chen ,  Kuei-Sheng Tseng

IPC分类号： H01L21/302 ,  H01L33/00

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  Y10S438/942

摘要： In a method of making device of a display, an insulating layer, a semiconductor layer, an ohmic contact layer, a second conductive layer, and a photoresist pattern are consecutively formed on a first conductive structure. The photoresist pattern includes a first thickness region, and a second thickness region outside the first thickness region. The thickness of the second thickness region is smaller than that of the first thickness region. In addition, in a gate driver on array (GOA) of a display, it includes a gate driver on array structure with a pull-down transistor. The pull-down transistor has a gate electrode, a semiconductor island, a source electrode and a drain electrode. The semiconductor island extends out of the edges of the gate electrode, the source electrode, and the drain electrode.

摘要翻译： 在制造显示装置的方法中，在第一导电结构上连续地形成绝缘层，半导体层，欧姆接触层，第二导电层和光致抗蚀剂图案。 光致抗蚀剂图案包括第一厚度区域和第一厚度区域外的第二厚度区域。 第二厚度区域的厚度小于第一厚度区域的厚度。 另外，在显示器的阵列（GOA）上的栅极驱动器中，它包括具有下拉晶体管的阵列结构上的栅极驱动器。 下拉晶体管具有栅电极，半导体岛，源电极和漏电极。 半导体岛从栅电极，源电极和漏电极的边缘延伸出来。

公开(公告)号：US20080198317A1

公开(公告)日：2008-08-21

申请号：US12068058

申请日：2008-02-01

申请人： Kuei-Sheng Tseng ,  Chung-Jen Cheng Chiang ,  Chu-Yu Liu ,  Shyh-Feng Chen

发明人： Kuei-Sheng Tseng ,  Chung-Jen Cheng Chiang ,  Chu-Yu Liu ,  Shyh-Feng Chen

IPC分类号： G02F1/1339 ,  G02F1/1333

CPC分类号： G02F1/13394 ,  G02F1/133512

摘要： A display panel includes lower and upper glass substrates. The lower glass substrate includes a pixel array having a plurality of pixel units formed thereon, wherein each pixel unit includes a transparent domain and an opaque domain surrounding the transparent domain, and an upward projection is formed in the opaque domain on the lower glass substrate. The upper glass substrate, mounted on the lower glass substrate, has a spacer formed therebeneath and protruded downwardly therefrom for keeping a cell gap between the upper and lower glass substrates, wherein the spacer is fallen in the opaque domain and has a lateral side in collision with the projection on the lower glass substrate to prevent relative displacement between the lower and upper glass substrates.

摘要翻译： 显示面板包括下玻璃基板和上玻璃基板。 下玻璃基板包括具有形成在其上的多个像素单元的像素阵列，其中每个像素单元包括透明域和围绕透明域的不透明域，并且在下玻璃基板上的不透明域中形成向上突出。 安装在下玻璃基板上的上玻璃基板具有形成在其下方并从其向下突出的间隔件，用于保持上玻璃基板和下玻璃基板之间的单元间隙，其中间隔件落在不透明区域中并且具有碰撞侧面 具有在下玻璃基板上的突起，以防止下玻璃基板和上玻璃基板之间的相对位移。

公开(公告)号：US07267555B2

公开(公告)日：2007-09-11

申请号：US11274834

申请日：2005-11-14

申请人： Hsin-Kai Huang ,  Kuei-Sheng Tseng ,  Chu-Yu Liu

发明人： Hsin-Kai Huang ,  Kuei-Sheng Tseng ,  Chu-Yu Liu

IPC分类号： H01R12/00

CPC分类号： G02F1/1345 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2330/08 ,  G11C19/287 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fan-out pattern having two or more fan-out sections is implemented between a driver IC and a display for reducing or eliminating the pathlength differences among the electrical conductors in the fan-out pattern. As such, some of the conductors between the driver IC and the display can have two or more zigzag swath widths. In a fan-out pattern having two fan-out sections, a first fan-out section widens the spacing, SI, between two adjacent conductors at the IC side to an intermediate spacing, SM, and a second fan-out section further widens the intermediate spacing SM to the spacing, SP, at the display side. With two fan-out sections, the first zigzag extension is implemented in some conductors between the IC side and the first fan-out section, and the second zigzag extension is implemented in some conductors between the first fan-out section and the second fan-out section.

公开(公告)号：US20070070285A1

公开(公告)日：2007-03-29

申请号：US11298389

申请日：2005-12-09

申请人： Chu-Yu Liu ,  Chung-Jen Chengchiang ,  Kuei-Sheng Tseng

发明人： Chu-Yu Liu ,  Chung-Jen Chengchiang ,  Kuei-Sheng Tseng

IPC分类号： G02F1/1339

CPC分类号： G02F1/13394 ,  G02F1/134309

摘要： An array substrate for a liquid crystal display (LCD) device. An exemplary embodiment of an array substrate comprises a transparent substrate. A plurality of first and second conductive lines overlies the transparent substrate and cross over each other, thereby defining a plurality of display regions. At least one first spacer overlies a portion of the first or second conductive lines, wherein the first spacer is not formed over an intersection of the first and second conductive lines. A pixel electrode layer overlies the display regions, wherein the first spacer partially covers the pixel electrode layer.

摘要翻译： 一种用于液晶显示（LCD）装置的阵列基板。 阵列基板的示例性实施例包括透明基板。 多个第一和第二导电线覆盖在透明基板上并彼此交叉，从而限定多个显示区域。 至少一个第一间隔物覆盖在第一或第二导电线的一部分上，其中第一间隔物不形成在第一和第二导线之间的交叉点上。 像素电极层覆盖显示区域，其中第一间隔物部分地覆盖像素电极层。

公开(公告)号：US20070046604A1

公开(公告)日：2007-03-01

申请号：US11400391

申请日：2006-04-10

申请人： Kuei-Sheng Tseng ,  Chu-Yu Liu ,  Ming-Hung Chen ,  Wen-Bin Chen ,  Tsong-Cheng Lin

发明人： Kuei-Sheng Tseng ,  Chu-Yu Liu ,  Ming-Hung Chen ,  Wen-Bin Chen ,  Tsong-Cheng Lin

IPC分类号： G09G3/36

CPC分类号： G09G3/3655 ,  G09G3/3614 ,  G09G2310/063 ,  G09G2320/0257 ,  G09G2320/0261

摘要： A method of inserting black frames is provided. The LCD comprises a pixel, and the pixel comprises a liquid crystal capacitor. Firstly, during a normal-mode period, a common voltage is provided to a first end of the liquid crystal capacitor. Next, a data signal is provided to a second end of the liquid crystal capacitor, so that the liquid crystal capacitor has a first voltage drop. Finally, during a dark-mode period, a first voltage different from the common voltage is provided to the first end of the liquid crystal capacitor to change the voltage at the second end of the liquid crystal capacitor, so that the liquid crystal capacitor has a second voltage drop to drive the pixel in a dark mode during the dark-mode period.

摘要翻译： 提供了一种插入黑框的方法。 LCD包括像素，像素包括液晶电容器。 首先，在正常模式期间，向液晶电容器的第一端提供公共电压。 接下来，将数据信号提供给液晶电容器的第二端，使得液晶电容器具有第一电压降。 最后，在暗模式期间，向液晶电容器的第一端提供与公共电压不同的第一电压，以改变液晶电容器的第二端的电压，使得液晶电容器具有 第二电压降，以在暗模式期间以暗模式驱动像素。

公开(公告)号：US20100022155A1

公开(公告)日：2010-01-28

申请号：US12574806

申请日：2009-10-07

申请人： Chu-Yu Liu ,  Chung-Jen Chengchiang ,  Kuei-Sheng Tseng

发明人： Chu-Yu Liu ,  Chung-Jen Chengchiang ,  Kuei-Sheng Tseng

IPC分类号： H01J9/20

CPC分类号： G02F1/13394 ,  G02F1/134309

摘要： An array substrate for a liquid crystal display (LCD) device. An exemplary embodiment of an array substrate comprises a transparent substrate. A plurality of first and second conductive lines overlies the transparent substrate and cross over each other, thereby defining a plurality of display regions. At least one first spacer overlies a portion of the first or second conductive lines, wherein the first spacer is not formed over an intersection of the first and second conductive lines. A pixel electrode layer overlies the display regions, wherein the first spacer partially covers the pixel electrode layer.

摘要翻译： 一种用于液晶显示（LCD）装置的阵列基板。 阵列基板的示例性实施例包括透明基板。 多个第一和第二导电线覆盖在透明基板上并彼此交叉，从而限定多个显示区域。 至少一个第一间隔物覆盖在第一或第二导电线的一部分上，其中第一间隔物不形成在第一和第二导电线的交叉点之上。 像素电极层覆盖显示区域，其中第一间隔物部分地覆盖像素电极层。

公开(公告)号：US20100001942A1

公开(公告)日：2010-01-07

申请号：US12437110

申请日：2009-05-07

申请人： TSUNG CHENG LIN ,  SHYH FENG CHEN ,  SHIH CHYN LIN ,  HSIANG PIN FAN ,  KUEI SHENG TSENG

发明人： TSUNG CHENG LIN ,  SHYH FENG CHEN ,  SHIH CHYN LIN ,  HSIANG PIN FAN ,  KUEI SHENG TSENG

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0443 ,  G09G2320/0209 ,  G09G2320/0233 ,  G09G2320/0242 ,  G09G2320/0247

摘要： A liquid crystal display device comprises a pixel matrix including a plurality of subpixels, wherein the voltage polarities of two horizontal adjacent subpixels are opposite to one another, and the voltage polarity of one subpixel in four serial subpixels along a diagonal direction is opposite to the voltage polarities of the other three subpixels.

摘要翻译： 液晶显示装置包括：包括多个子像素的像素矩阵，其中两个水平相邻子像素的电压极性彼此相反，并且沿对角线方向的四个串行子像素中的一个子像素的电压极性与电压 其他三个子像素的极性。

公开(公告)号：US20050190168A1

公开(公告)日：2005-09-01

申请号：US10865008

申请日：2004-06-10

申请人： Bo-Ren Jiang ,  Chu-Yu Liu ,  Chung-Jen Chiang ,  Kuei-Sheng Tseng ,  Lee-Hsun Chang

发明人： Bo-Ren Jiang ,  Chu-Yu Liu ,  Chung-Jen Chiang ,  Kuei-Sheng Tseng ,  Lee-Hsun Chang

IPC分类号： G02F1/1362 ,  G09G3/36 ,  G09G5/00

CPC分类号： G02F1/136204 ,  G09G3/3648 ,  G09G2330/04

摘要： A protection circuit of an LCD panel. The LCD panel includes a display cell coupled between a data electrode, a gate electrode and a common electrode. A switch includes a first terminal and a second terminal. The first terminal is coupled to the data electrode, the gate electrode or both. The switch is turned on when a voltage level of the first terminal or the second terminal exceeds a threshold voltage. An ESD protection circuit includes a capacitive load and a resistive load, coupled between the second terminal and the common electrode.

摘要翻译： LCD面板的保护电路。 LCD面板包括耦合在数据电极，栅电极和公共电极之间的显示单元。 开关包括第一端子和第二端子。 第一端子耦合到数据电极，栅电极或两者。 当第一端子或第二端子的电压电平超过阈值电压时，开关导通。 ESD保护电路包括耦合在第二端子和公共电极之间的电容性负载和电阻负载。