知搜-全球专利检索

  1. 登录
  2. 注册

搜索结果

28 条记录 (耗时 0.024 秒)

    Saving and loading graphical processing unit (GPU) arrays providing high computational capabilities in a computing environment
    1.
    发明授权
    Saving and loading graphical processing unit (GPU) arrays providing high computational capabilities in a computing environment 有权

    公开(公告)号：US08549500B2

    公开(公告)日：2013-10-01

    申请号：US12894547

    申请日：2010-09-30

    申请人： Halldor N. Stefansson ,  Edric Ellis

    发明人： Halldor N. Stefansson ,  Edric Ellis

    IPC分类号： G06F9/45 ,  G06F9/44

    CPC分类号： G06T1/20 ,  G06F9/5072

    摘要： A device receives, via a technical computing environment, a program that includes a parallel construct and a command to be executed by graphical processing units, and analyzes the program. The device also creates, based on the parallel construct and the analysis, one or more instances of the command to be executed in parallel by the graphical processing units, and transforms, via the technical computing environment, the one or more command instances into one or more command instances that are executable by the graphical processing units. The device further allocates the one or more transformed command instances to the graphical processing units for parallel execution, and receives, from the graphical processing units, one or more results associated with parallel execution of the one or more transformed command instances by the graphical processing units.

    GRAPHICAL PROCESSING UNIT (GPU) ARRAYS
    2.
    发明申请
    GRAPHICAL PROCESSING UNIT (GPU) ARRAYS 有权
    图形处理单元（GPU）阵列

    公开(公告)号：US20110035736A1

    公开(公告)日：2011-02-10

    申请号：US12894544

    申请日：2010-09-30

    申请人： Halldor N. Stefansson ,  Edric Ellis ,  Jocelyn Luke Martin

    发明人： Halldor N. Stefansson ,  Edric Ellis ,  Jocelyn Luke Martin

    IPC分类号： G06F9/45

    CPC分类号： G06F8/41 ,  G06F9/5072

    摘要： A device initiates a technical computing environment (TCE), and receives, via the TCE, a program command that permits the TCE to access a graphical processing unit that is remote to the device, where the program command permits the TCE to seamlessly transfer data to the remote GPU. The device transforms, via the TCE, the program command into a program command that is executable by the remote GPU, and provides the transformed program command to the remote GPU for execution. The device also receives, from the remote GPU, one or more results associated with execution of the transformed program command by the remote GPU, and utilizes the one or more results via the TCE.

    摘要翻译： 设备启动技术计算环境（TCE），并通过TCE接收允许TCE访问远离设备的图形处理单元的程序命令，其中程序命令允许TCE将数据无缝传输到 远程GPU。 该设备通过TCE将程序命令转换为可由远程GPU执行的程序命令，并将转换后的程序命令提供给远程GPU进行执行。 该设备还从远程GPU接收与远程GPU执行变换的程序命令相关联的一个或多个结果，并且经由TCE利用一个或多个结果。

    PARALLEL IMPLEMENTATION OF MAXIMUM A POSTERIORI PROBABILITY DECODER
    3.
    发明申请
    PARALLEL IMPLEMENTATION OF MAXIMUM A POSTERIORI PROBABILITY DECODER 有权
    并行执行最大的一个POSTERIORI概率解码器

    公开(公告)号：US20130142289A1

    公开(公告)日：2013-06-06

    申请号：US13312615

    申请日：2011-12-06

    申请人： Brian FANOUS ,  Halldor N. Stefansson

    发明人： Brian FANOUS ,  Halldor N. Stefansson

    IPC分类号： H04L27/06

    CPC分类号： G06F17/16 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3966 ,  H03M13/616

    摘要： A MAP decoder may be implemented in parallel. In one implementation, a device may receive an input array that represents received encoded data and calculate, in parallel, a series of transition matrices from the input array. The device may further calculate, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector. The device may further calculate, in parallel and based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array.

    摘要翻译： 可以并行地实现MAP解码器。 在一个实现中，设备可以接收表示接收的编码数据的输入阵列，并且平行地计算来自输入阵列的一系列转移矩阵。 该装置还可以并行地计算一系列转移矩阵的累积乘积和初始化向量的乘积。 该装置可以并行地并且基于一系列转移矩阵和初始化向量的累积乘积的乘积进一步计算与输入阵列中接收到的编码数据的解码版本相对应的输出阵列。

    SAVING AND LOADING GRAPHICAL PROCESSING UNIT (GPU) ARRAYS
    4.
    发明申请
    SAVING AND LOADING GRAPHICAL PROCESSING UNIT (GPU) ARRAYS 有权
    节省和加载图形处理单元（GPU）阵列

    公开(公告)号：US20110035737A1

    公开(公告)日：2011-02-10

    申请号：US12894547

    申请日：2010-09-30

    申请人： Halldor N. Stefansson ,  Edric Ellis

    发明人： Halldor N. Stefansson ,  Edric Ellis

    IPC分类号： G06F9/45

    CPC分类号： G06T1/20 ,  G06F9/5072

    摘要： A device receives, via a technical computing environment, a program that includes a parallel construct and a command to be executed by graphical processing units, and analyzes the program. The device also creates, based on the parallel construct and the analysis, one or more instances of the command to be executed in parallel by the graphical processing units, and transforms, via the technical computing environment, the one or more command instances into one or more command instances that are executable by the graphical processing units. The device further allocates the one or more transformed command instances to the graphical processing units for parallel execution, and receives, from the graphical processing units, one or more results associated with parallel execution of the one or more transformed command instances by the graphical processing units.

    摘要翻译： 设备通过技术计算环境接收包括由图形处理单元执行的并行结构和命令的程序，并分析该程序。 设备还基于并行构造和分析创建要由图形处理单元并行执行的命令的一个或多个实例，并且经由技术计算环境将一个或多个命令实例转换为一个或多个命令实例 更多可由图形处理单元执行的命令实例。 所述设备还将所述一个或多个变换的命令实例分配给所述图形处理单元用于并行执行，并且从所述图形处理单元接收与所述图形处理单元的所述一个或多个变换的命令实例的并行执行相关联的一个或多个结果 。

    MEDIA FOR PERFORMING PARALLEL PROCESSING OF DISTRIBUTED ARRAYS
    7.
    发明申请
    MEDIA FOR PERFORMING PARALLEL PROCESSING OF DISTRIBUTED ARRAYS 有权
    执行分布式阵列并行处理的媒体

    公开(公告)号：US20090044179A1

    公开(公告)日：2009-02-12

    申请号：US12254605

    申请日：2008-10-20

    申请人： Piotr R. LUSZCZEK ,  John N. LITTLE ,  Joseph F. HICKLIN ,  Jocelyn Luke MARTIN ,  Halldor N. STEFANSSON ,  Edric ELLIS ,  Penelope L. ANDERSON ,  Nausheen B. MOULANA ,  Brett BAKER ,  Loren DEAN ,  Roy E. LURIE

    发明人： Piotr R. LUSZCZEK ,  John N. LITTLE ,  Joseph F. HICKLIN ,  Jocelyn Luke MARTIN ,  Halldor N. STEFANSSON ,  Edric ELLIS ,  Penelope L. ANDERSON ,  Nausheen B. MOULANA ,  Brett BAKER ,  Loren DEAN ,  Roy E. LURIE

    IPC分类号： G06F9/44

    CPC分类号： G06F9/5027 ,  G06F8/314

    摘要： One or more computer-readable media store executable instructions that, when executed by processing logic, perform parallel processing. The media store one or more instructions for initiating a single programming language, and identifying, via the single programming language, one or more data distribution schemes for executing a program. The media also store one or more instructions for transforming, via the single programming language, the program into a parallel program with an optimum data distribution scheme selected from the one or more identified data distribution schemes, and allocating the parallel program to two or more labs for parallel execution. The media further store one or more instructions for receiving one or more results associated with the parallel execution of the parallel program from the two or more labs, and providing the one or more results to the program.

    摘要翻译： 一个或多个计算机可读介质存储当由处理逻辑执行时执行并行处理的可执行指令。 媒体存储用于启动单个编程语言的一个或多个指令，以及通过单个编程语言识别用于执行程序的一个或多个数据分发方案。 媒体还存储一个或多个指令，用于通过单一编程语言将程序转换成具有从一个或多个识别的数据分发方案中选择的最佳数据分配方案的并行程序，并将并行程序分配给两个或更多个实验室 用于并行执行。 媒体还存储一个或多个指令，用于从两个或更多实验室接收与并行程序的并行执行相关联的一个或多个结果，并将一个或多个结果提供给程序。

    Parallel implementation of maximum a posteriori probability decoder
    9.
    发明授权
    Parallel implementation of maximum a posteriori probability decoder 有权
    并行实现最大后验概率解码器

    公开(公告)号：US08594217B2

    公开(公告)日：2013-11-26

    申请号：US13312615

    申请日：2011-12-06

    申请人： Brian Fanous ,  Halldor N. Stefansson

    发明人： Brian Fanous ,  Halldor N. Stefansson

    IPC分类号： H04L5/12

    CPC分类号： G06F17/16 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3966 ,  H03M13/616

    摘要： A MAP decoder may be implemented in parallel. In one implementation, a device may receive an input array that represents received encoded data and calculate, in parallel, a series of transition matrices from the input array. The device may further calculate, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector. The device may further calculate, in parallel and based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array.

    摘要翻译： 可以并行地实现MAP解码器。 在一个实现中，设备可以接收表示接收的编码数据的输入阵列，并且平行地计算来自输入阵列的一系列转移矩阵。 该装置还可以并行地计算一系列转移矩阵的累积乘积和初始化向量的乘积。 该装置可以并行地并且基于一系列转移矩阵和初始化向量的累积乘积的乘积进一步计算与输入阵列中接收到的编码数据的解码版本相对应的输出阵列。