Stack frame cache on a microprocessor chip
    1.
    发明授权
    Stack frame cache on a microprocessor chip 失效
    微处理器芯片上的堆栈缓存

    公开(公告)号:US4811208A

    公开(公告)日:1989-03-07

    申请号:US863878

    申请日:1986-05-16

    摘要: A plurality of global registers are provided on the microprocessor chip. One of a global registers is a frame pointer register containing the current frame pointer, and the remainder of the global registers are available to a current process as general registers. A plurality of floating point registers are also provided for use by the current process in execution of floating point arithmetic operations. A register set pool made up of a plurality of register sets is provided, each register set being comprised of a number of local registers. When a call instruction is decoded, a register set of local registers from the register set pool is allocated to the called procedure, and the frame pointer register is initialized. When a return instruction is decoded, the register set is freed for allocation to another procedure called by a subsequent call instruction. If the register set pool is depleted a register set associated with a previous procedure is saved in the main memory, and that register set is allocated to the current procedure. The local registers in a register set associated with a procedure contain linkage information including a pointer to the previous frame and an instruction pointer, thus enabling most call and return instructions to execute without needing any references to off-chip memory.

    摘要翻译: 在微处理器芯片上提供多个全局寄存器。 全局寄存器之一是包含当前帧指针的帧指针寄存器,其余的全局寄存器作为通用寄存器可用于当前进程。 还提供了多个浮点寄存器供当前进程在浮点算术运算中使用。 提供由多个寄存器组构成的寄存器组池,每个寄存器组由多个本地寄存器组成。 当调用指令被解码时,寄存器组池的本地寄存器的寄存器组被分配给被调用的程序,并且帧指针寄存器被初始化。 当返回指令被解码时,寄存器组被释放以分配给由后续调用指令调用的另一过程。 如果寄存器集合池耗尽,则与先前过程相关联的寄存器集保存在主存储器中,并且该寄存器集被分配给当前过程。 与过程相关联的寄存器集中的本地寄存器包含链接信息,包括指向前一帧的指针和指令指针,从而使得大多数调用和返回指令执行而不需要对片外存储器的任何引用。

    Mixed-precision floating point operations from a single instruction
opcode
    2.
    发明授权
    Mixed-precision floating point operations from a single instruction opcode 失效
    来自单指令操作码的混合精度浮点运算

    公开(公告)号:US4823260A

    公开(公告)日:1989-04-18

    申请号:US119547

    申请日:1987-11-12

    IPC分类号: G06F7/57 G06F7/48

    摘要: Apparatus for performing mixed precision calculations in the floating point unit of a microprocessor from a single instruction opcode. 80-bit floating-point registers (44) may be specified as the source or destination address of a floating-point instruction. When the address range of the destination indicates (26) that a floating point register is addressed, the result of that operation is not rounded to the precision specified by the instruction, but is rounded (58) to extended 80-bit precision and loaded into the floating point register (FP-44). When the address range of the source indicates (26) that an FP register is addressed, the data is loaded from the FP register in extended precision, regardless of the precision specified by the instruction. In this way, real and long-real operations can be made to use extended precision numbers without explicitly specifying that in the opcode.

    摘要翻译: 用于从单个指令操作码在微处理器的浮点单元中执行混合精度计算的装置。 可以将80位浮点寄存器(44)指定为浮点指令的源地址或目标地址。 当目的地的地址范围指示(26)指定浮点寄存器时,该操作的结果不会舍入到指令指定的精度,而是舍入(58)到扩展的80位精度并加载到 浮点寄存器(FP-44)。 当源地址范围指示(26)FP寄存器被寻址时,无论指令指定的精度如何,数据都以扩展精度从FP寄存器加载。 以这种方式,可以使用实际和长期实际的操作来使用扩展精度数字,而无需在操作码中明确指定。