Abstract:
A power control system uses two separate currents to control a startup operation of the power control system. One of the currents has a small value and is used to charge an output voltage to an initial value. Once the initial value is reached, a second current that has a large value is used to charge the output voltage to an operating voltage value.
Abstract:
A switching device (20) is formed to generate a ramp voltage by using a capacitor (48) formed on the semiconductor die (90) with the switching device (20). The switching device (20) drives a high-power device to conduct load currents for a load. The ramp voltage is used to gradually increase the drive that is applied to the high-power device in order to gradually increase the current conducted by the high-power device.
Abstract:
A voltage detection device (10, 30) utilizes grounded gate J-FET transistors (16,17,18) to detect desired input voltage values. The grounded gate J-FET transistors (16,17,18) function in different modes as the input voltage varies to facilitate detecting the desired input voltage values.
Abstract:
In one embodiment, an oscillator circuit is configured to oscillate at a base frequency. The oscillator is configured to receive a synchronization signal and restart a period of the oscillator signal responsively to the synchronization signal.
Abstract:
A controller oscillator provides a periodic output signal having first and second output level states. The oscillator is responsive to an applied saw tooth signal that varies between first and second voltages (Vlow,Vhigh). The oscillator is comprised of a comparator (82) the non-inverting input of which receives the saw tooth signal applied thereto to produce the periodic output signal at its output (86). A first voltage reference circuit (88, 90, and 92) generates the second voltage (Vhigh) that is applied to the inverting input of the comparator while the periodic output signal is at the first output level state and the input signal charges from the first voltage (Vlow) towards the second voltage. As the input signal becomes equal to the second voltage the output of the comparator switches to the second output level state and a second voltage reference (92,94, 96) provides the first voltage at the inverting input of the comparator.
Abstract:
In one embodiment, a quasi-resonant power supply controller is configured to select particular valley values of a switch voltage to determine a time to enable a power switch. The valleys values are selected responsively to a range of values of a feedback signal.
Abstract:
A method and circuit for detecting a current and compensating for an offset voltage. The circuit includes two comparators where one of the comparators has two input terminals and the other comparator has three input terminals. An input terminal of each of the two comparators are commonly connected together, the other input terminal of the two-input comparator is coupled for receiving a first reference voltage, and a second input terminal of the three-input comparator is coupled for receiving a second reference voltage. During a first portion of the period of a sense signal the two comparators operate in a sensing mode and during a second portion of the period of the sense signal the comparator having the three input terminals operate in a current nullification mode or an offset voltage compensation mode. An offset compensation signal is generated during the second portion of the sense signal.
Abstract:
In one embodiment, a low power voltage detection circuit includes a first voltage detection device that receives power from an input voltage and a second voltage detection device receives power from an output of the low power voltage detection circuit.
Abstract:
A method and a power conversion apparatus having a substantially direct current input voltage, an output transformer having a primary inductor and at least a secondary winding, and a transistor for controlling the transfer of energy from the primary inductor to the secondary winding and coupled to a controller for switching the transistor on and off at a predetermined rate. A sensor for sensing the power required at the output of the conversion apparatus and for generating a voltage representative thereof is provided, as is provided a sensor for sensing the peak current in the primary inductor and for developing a voltage representative thereof. The controller contains a circuit for inhibiting selected on-cycles of the transistor when the power demand from the output of the conversion apparatus is less than the desired peak current in the primary inductor, the circuit comprising a comparator, a current source for developing a biasing voltage representative of the desired peak current in the primary inductor across a resistor external to the controller during the time when the transistor is switched off, means for receiving the voltage representative of the power required, comparing the biasing voltage to the voltage representative of the power required at the output, and having the output of the comparator coupled to the gate of the transistor for causing the transistor to skip on-cycles when the power demand from the output is below that power the biasing voltage is representative of.
Abstract:
In one embodiment, an oscillator circuit is configured to oscillate at a base frequency. The oscillator is configured to receive a synchronization signal and restart a period of the oscillator signal responsively to the synchronization signal.