公开(公告)号：US5285415A

公开(公告)日：1994-02-08

申请号：US902209

申请日：1992-06-22

Applicant: Eric Depret ,  Laurent Sourgen

Inventor： Eric Depret ,  Laurent Sourgen

IPC: G11C17/00 ,  G06F12/16 ,  G06K19/07 ,  G07F7/08 ,  G07F7/10 ,  G11C16/02 ,  G11C16/10 ,  H03K21/00 ,  G06K5/00 ,  G06F15/30

CPC classification number: G07F7/1008 ,  G06K19/07 ,  G06Q20/341 ,  G07F7/082 ,  G07F7/0866 ,  G11C16/102 ,  G11C16/105

Abstract: An integrated circuit for a passive unit counting memory card comprises p levels (10, 11, 12) of data counting memory. The levels contain corresponding numbers of cases n.sub.1 . . . n.sub.p, a write operation being achieved in a case of an upper rank level each time all the cases of the lower rank level have been enabled, the cases of the lower levels then being erased. The circuit comprises p-1 ghost levels (21, 22) identical to the p-1 upper rank levels of the p counting levels. The addressing logic of the ghost levels is such that the cases of ghost levels are addressed in write phase simultaneously with the cases of the corresponding counting levels and, after a write phase, are addressed in erase phase simultaneously with the cases of the levels of lower rank than the one that has just been enabled.

Abstract translation: 用于无源单元计数存储卡的集成电路包括数据计数存储器的p级（10,11,12）。 级别包含相应数量的病例n1。 。 。 np，每当所有低级别的所有情况都被使能时，在高级别级别的情况下实现写入操作，则较低级别的情况然后被擦除。 该电路包括与p个计数电平的p-1个上限电平相同的p-1个重影电平（21,22）。 幽灵级别的寻址逻辑是这样的：在写入阶段，与相应的计数级别的情况同时处理鬼电平的情况，并且在写入阶段之后，在擦除阶段同时处理较低级别的情况 比刚刚启用的更高。

公开(公告)号：US5264689A

公开(公告)日：1993-11-23

申请号：US817869

申请日：1992-01-07

Applicant: Philippe Maes ,  Eric Depret ,  Philippe Hiolle

Inventor： Philippe Maes ,  Eric Depret ,  Philippe Hiolle

IPC: G07F7/02 ,  G07F7/08 ,  G06K5/00

CPC classification number: G07F7/0866 ,  G06Q20/3433 ,  G07F7/02

Abstract: The disclosure concerns memory cards and, more particularly, cards that are used as means of prepayment in installations for the dispensing of products and services. It is proposed to make the memory rechargeable by means of a credit counter, incrementable from outside the card, and a comparator which compares the content of this counter with that of a page counter. The page counter records the number of pages of P accounting units already used up. A no more credit signal is emitted on an external terminal when the content of the page counter reaches the content of the credit counter. A security system against the fraudulent recharging of the card is set up by an algorithm bringing into play the content of the credit counter and an identification number contained in the card.

Abstract translation: 本公开涉及存储卡，更具体地，涉及在用于分发产品和服务的安装中用作预付款的手段的卡。 建议通过信用计数器使存储器可再充电，可从卡外部递增，以及将该计数器的内容与页计数器的内容进行比较的比较器。 页计数器记录已经使用的P计费单元的页数。 当页计数器的内容达到信用计数器的内容时​​，在外部终端上不再发送信用信号。 针对卡的欺诈性再充电的安全系统由引入信用计数器的内容的算法和卡中包含的识别号码来建立。

公开(公告)号：US4970675A

公开(公告)日：1990-11-13

申请号：US310172

申请日：1989-02-15

Applicant: Philippe Gallay ,  Eric Depret

Inventor： Philippe Gallay ,  Eric Depret

IPC: G06F7/50 ,  G06F7/52 ,  G06F7/72

CPC classification number: G06F7/5272 ,  G06F7/5095 ,  G06F7/722 ,  G06F7/49931 ,  G06F7/723

Abstract: A multiplier for two binary values, X and Y, comprising a very high number (q) of bits, wherein memories storing the numbers X and Y and a result register MR are provided, X being expressed as the sequence of bits (x.sub.q-1 . . . x.sub.j . . . x.sub.0), uses the algorithm consisting in sequentially carrying out from j=q-1 to j=0 the additions 2R+x.sub.j Y and each time entering the result in the result memory (MR). In this multiplier the adders are grouped into n blocks of m bits (with n.times.m=q), m being chosen so that the carry transfer time into a block is lower than a clock period. Each block comprises a first and a second line of elementary adders forming the cells (C.sub.1 to C.sub.m+1) associated with each pair of bits to be added. This multiplier is more particularly adapted for carrying out the operations XYmodN and X.sup.S modN.

Abstract translation: 两个二进制值的乘法器X和Y包括非常高数量的（q）位，其中存储存储数字X和Y的存储器和结果寄存器MR被提供，X被表示为比特序列（xq-1 使用从j = q-1到j = 0顺序执行的算法，加法2R + xjY，每次在结果存储器（MR）中输入结果）。 在该乘法器中，加法器被分组成n个m位（n×m = q），m被选择，使得进入块的进位传送时间低于时钟周期。 每个块包括形成与要添加的每对比特相关联的小区（C1至Cm + 1）的基本加法器的第一和第二行。 该乘法器特别适用于执行XYmodN和XSmodN的操作。

公开(公告)号：US07272385B2

公开(公告)日：2007-09-18

申请号：US10311863

申请日：2002-07-03

Applicant: Michel Mirouze ,  Eric Depret ,  Béatrice Parfait ,  Yves Thorigne

Inventor： Michel Mirouze ,  Eric Depret ,  Béatrice Parfait ,  Yves Thorigne

IPC: H04Q7/22

CPC classification number: G09F27/00

Abstract: To activate an interactive multimedia station (BN) providing facilities of a mobile office to a user of a mobile radio terminal (TM), the mobile terminal (TM) signals its presence in the vicinity of the station (BN), either by local radio link to the station itself, or by short messages to a management server (SB) when the terminal is a radiotelephone. An identifier of the terminal is transmitted from the station (BN) to the management server, or to a location recorder of the radiotelephony network (RR) to activate the station after validating the identifier.

Abstract translation: 为了激活向移动无线电终端（TM）的用户提供移动办公室的设施的交互式多媒体站（BN），移动终端（TM）通过本地无线电（TM）向站点（BN）的附近发出信号， 当终端是无线电话时，链接到站本身，或通过短消息到管理服务器（SB）。 从站（BN）向管理服务器或无线电话网络（RR）的位置记录器发送终端的标识符，以在验证该标识符之后激活该站。

公开(公告)号：US07050554B2

公开(公告)日：2006-05-23

申请号：US10203216

申请日：2001-02-13

Applicant: Béatrice Parfait ,  Eric Depret ,  Michel Mirouze

Inventor： Béatrice Parfait ,  Eric Depret ,  Michel Mirouze

IPC: H04M15/00 ,  H04M17/00

CPC classification number: G07F7/0866 ,  G06Q20/28 ,  G06Q20/363 ,  G06Q40/02

Abstract: The balance or a portion of the balance associated with a prepaid card with or without a microcircuit is paid into a balance portion collection server, as a donations to charities, after setting up a call between a terminal and the server and after confirmation of the payment by the user at the terminal to increment a counter with the balance or balance portion. In another embodiment, balance portions are paid cyclically into the server or into a connection unit as and when a telephone call runs.

公开(公告)号：US5495098A

公开(公告)日：1996-02-27

申请号：US220684

申请日：1994-03-31

Applicant: Jean-Claude Pailles ,  Eric Depret ,  Philippe Hiolle

Inventor： Jean-Claude Pailles ,  Eric Depret ,  Philippe Hiolle

IPC: G07F7/02 ,  G07F7/08 ,  G07F7/10 ,  G07F7/12 ,  G06K19/06

CPC classification number: G07F7/1008 ,  G06Q20/341 ,  G06Q20/3433 ,  G06Q20/40975 ,  G07F7/02 ,  G07F7/082 ,  G07F7/0826 ,  G07F7/0866

Abstract: Smart card payment process.The card in particular contains an irreversible counter, a balance and a certificate proving the integrity of the preceding informations. The content of the card can only be updated by terminals knowing, the calculation secrets of the certificate. By means of the irreversible counter which intervenes in the calculation of the certificate, it is not possible to reload into the card a prior content (balance/certificate), because such a reloading requires the incrementation of the counter, which renders null and void the prior certificate.

Abstract translation: 智能卡支付流程。 该卡特别包含不可逆计数器，余额和证明上述信息的完整性的证书。 卡的内容只能通过终端知道证书的计算秘密来更新。 通过干预计算证书的不可逆计数器，不可能将现有内容（余额/证书）重新加载到卡中，因为这种重新加载需要增加计数器，这使得无效 事先证明