公开(公告)号：US20060019414A1

公开(公告)日：2006-01-26

申请号：US10899252

申请日：2004-07-26

Applicant: Chien-Jung Wang ,  Su-Chen Fan ,  Ding-Da Hu ,  Hsueh-Chung Chen

Inventor： Chien-Jung Wang ,  Su-Chen Fan ,  Ding-Da Hu ,  Hsueh-Chung Chen

IPC: H01L21/66 ,  G01R31/26

CPC classification number: H01L22/34 ,  G01R31/2853 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wiring structure with improved resistance to void formation and a method of making the same are described. The wiring structure has a first conducting layer that includes a large area portion which is connected to an end of a protrusion with a plurality of “n” overlapping segments and at least one bending portion. The other end of the protrusion is connected to the bottom of a via which has an overlying second conducting layer. A bend is formed by overlapping the ends of two adjacent segments at an angle between 45° and 135°. The protrusion may also include at least one extension at a segment end beyond a bend. A bending portion and extension are used as bottlenecks to delay the diffusion of a vacancy from the large area portion to the vicinity of the via and is especially effective for copper interconnects or in a via test structure.

Abstract translation: 描述了具有改善的抗空隙形成的布线结构及其制造方法。 布线结构具有包括大面积部分的第一导电层，该区域部分连接到具有多个“n”个重叠部分和至少一个弯曲部分的突起的端部。 突起的另一端连接到具有覆盖的第二导电层的通路的底部。 通过以45°和135°之间的角度重叠两个相邻段的端部形成弯曲。 突出部还可以包括在弯曲部以外的段端部处的至少一个延伸部。 弯曲部分和延伸部用作延迟空位从大面积部分扩散到通孔附近的瓶颈，并且对于铜互连或通孔测试结构尤其有效。

公开(公告)号：US20050082677A1

公开(公告)日：2005-04-21

申请号：US10886421

申请日：2004-07-07

Applicant: Su-Chen Fan ,  Ding-Da Hu

Inventor： Su-Chen Fan ,  Ding-Da Hu

IPC: H01L23/053 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L23/528 ,  H01L23/5226 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Interconnect structures moderate or eliminate the formation and/or migration of voids in or near via-conductive layer interfaces.

Abstract translation: 互连结构适中或消除通孔导电层界面中或附近的空隙的形成和/或迁移。

公开(公告)号：US07301239B2

公开(公告)日：2007-11-27

申请号：US10899252

申请日：2004-07-26

Applicant: Chien-Jung Wang ,  Su-Chen Fan ,  Ding-Da Hu ,  Hsueh-Chung Chen

Inventor： Chien-Jung Wang ,  Su-Chen Fan ,  Ding-Da Hu ,  Hsueh-Chung Chen

IPC: H01L29/41

CPC classification number: H01L22/34 ,  G01R31/2853 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wiring structure with improved resistance to void formation and a method of making the same are described. The wiring structure has a first conducting layer that includes a large area portion which is connected to an end of a protrusion with a plurality of “n” overlapping segments and at least one bending portion. The other end of the protrusion is connected to the bottom of a via which has an overlying second conducting layer. A bend is formed by overlapping the ends of two adjacent segments at an angle between 45° and 135°. The protrusion may also include at least one extension at a segment end beyond a bend. A bending portion and extension are used as bottlenecks to delay the diffusion of a vacancy from the large area portion to the vicinity of the via and is especially effective for copper interconnects or in a via test structure.

Abstract translation: 描述了具有改善的抗空隙形成的布线结构及其制造方法。 布线结构具有包括大面积部分的第一导电层，该区域部分连接到具有多个“n”个重叠部分和至少一个弯曲部分的突起的端部。 突起的另一端连接到具有覆盖的第二导电层的通路的底部。 通过以45°和135°之间的角度重叠两个相邻段的端部形成弯曲。 突出部还可以包括在弯曲部以外的段端部处的至少一个延伸部。 弯曲部分和延伸部用作延迟空位从大面积部分扩散到通孔附近的瓶颈，并且对于铜互连或通孔测试结构尤其有效。