KITS FOR MULTIPARAMETRIC PHOSPHO ANALYSIS
    1.
    发明申请
    KITS FOR MULTIPARAMETRIC PHOSPHO ANALYSIS 有权
    多功能磷光体分析仪

    公开(公告)号:US20100240542A1

    公开(公告)日:2010-09-23

    申请号:US12730170

    申请日:2010-03-23

    摘要: As disclosed herein, the present invention provides for kits and a composition for diagnosis, prognosis, drug discovery, drug development, and patient stratification. The kits can comprise a plurality of binding elements for cell surface markers, and a plurality of binding elements for state-specific intracellular markers. The kits can further comprise a plurality of modulators directed for the particular cell function or signaling pathways. The kits can further include fixatives, permeabilizing agent, buffers, containers, instructions, and software for data analysis/compilation.

    摘要翻译: 如本文所公开的,本发明提供用于诊断,预后,药物发现,药物开发和患者分层的试剂盒和组合物。 试剂盒可以包含用于细胞表面标记的多个结合元件,以及用于状态特异性细胞内标记物的多个结合元件。 试剂盒还可以包含针对特定细胞功能或信号传导途径的多个调节剂。 试剂盒还可以包括固定剂,渗透剂,缓冲液,容器,说明书和用于数据分析/汇编的软件。

    System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table
    2.
    发明授权
    System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table 有权
    用于应用纠错码(ECC)擦除模式的系统和方法,并从页面解除分配表中清除记录的信息

    公开(公告)号:US07313749B2

    公开(公告)日:2007-12-25

    申请号:US10879643

    申请日:2004-06-29

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1064

    摘要: A system utilizing an erasure mode in an error correction code algorithm is described that includes non-volatile memory storing a page deallocation table. A memory controller stores and retrieves data from a memory subsystem, and uses an error correction code algorithm to correct data corruption in retrieved data. An error analysis algorithm executed in a processor records instances of data corruption in the page deallocation tables and deallocates memory regions associated with multiple occurrences of data corruption at single bit locations. The error analysis algorithm further causes the memory controller to apply an erasure mode of the error correction code algorithm upon detection of a repeated pattern of data corruption across different addresses of the memory subsystem, and removes entries in the page deallocation table that correspond to data corruption addressed by application of the erasure mode.

    摘要翻译: 描述了在纠错码算法中利用擦除模式的系统,其包括存储页面解除分配表的非易失性存储器。 存储器控制器从存储器子系统存储和检索数据,并使用纠错码算法来校正检索数据中的数据损坏。 在处理器中执行的错误分析算法记录页面解除分配表中的数据损坏的实例,并释放与单个位位置上的多次数据损坏相关联的存储器区域。 错误分析算法进一步导致存储器控制器在检测到存储器子系统的不同地址上的重复数据损坏模式时应用纠错码算法的擦除模式,并且去除页面分配表中对应于数据损坏的条目 通过应用擦除模式来解决。

    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem
    3.
    发明申请
    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem 有权
    用于在存储器子系统中控制纠错码(ECC)算法的应用的系统和方法

    公开(公告)号:US20050289440A1

    公开(公告)日:2005-12-29

    申请号:US10879262

    申请日:2004-06-29

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1012

    摘要: In one embodiment of the invention, a computer readable medium, comprising executable instructions for controlling application of an error correction code (ECC) algorithm in a memory subsystem, comprises code for recording occurrences of data corruption in data retrieved from the memory subsystem, code for analyzing the occurrences of data corruption to detect a repeated bit pattern of data corruption across different addresses of the memory subsystem, and code for controlling application of the ECC algorithm to erase bits associated with a repeated bit pattern, detected by the code for analyzing, from data retrieved from the memory subsystem.

    摘要翻译: 在本发明的一个实施例中,包括用于控制存储器子系统中的纠错码(ECC)算法的应用的可执行指令的计算机可读介质包括用于记录从存储器子系统检索的数据中的数据损坏的发生的代码, 分析数据损坏的发生以检测在存储器子系统的不同地址之间的数据损坏的重复位模式;以及用于控制ECC算法的应用以擦除与由用于分析的代码检测的重复位模式相关联的位的代码, 从内存子系统检索的数据。

    Kits for multiparametric phospho analysis
    4.
    发明授权
    Kits for multiparametric phospho analysis 有权
    多参数磷酸分析试剂盒

    公开(公告)号:US08242248B2

    公开(公告)日:2012-08-14

    申请号:US12730170

    申请日:2010-03-23

    IPC分类号: C07K16/00

    摘要: As disclosed herein, the present invention provides for kits and a composition for diagnosis, prognosis, drug discovery, drug development, and patient stratification. The kits can comprise a plurality of binding elements for cell surface markers, and a plurality of binding elements for state-specific intracellular markers. The kits can further comprise a plurality of modulators directed for the particular cell function or signaling pathways. The kits can further include fixatives, permeabilizing agent, buffers, containers, instructions, and software for data analysis/compilation.

    摘要翻译: 如本文所公开的,本发明提供用于诊断,预后,药物发现,药物开发和患者分层的试剂盒和组合物。 试剂盒可以包含用于细胞表面标记的多个结合元件,以及用于状态特异性细胞内标记物的多个结合元件。 试剂盒还可以包含针对特定细胞功能或信号传导途径的多个调节剂。 试剂盒还可以包括固定剂,渗透剂,缓冲液,容器,说明书和用于数据分析/汇编的软件。

    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem
    5.
    发明授权
    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem 有权
    用于在存储器子系统中控制纠错码(ECC)算法的应用的系统和方法

    公开(公告)号:US07437651B2

    公开(公告)日:2008-10-14

    申请号:US10879262

    申请日:2004-06-29

    IPC分类号: H03M13/00 G11C29/00

    CPC分类号: G06F11/1012

    摘要: A method for controlling application of an erasure mode of an error correction code (ECC) algorithm in a memory subsystem includes detecting errors in cache lines retrieved from the memory subsystem using the ECC algorithm. The method also analyzes the errors to detect a repeated bit pattern of data corruption within the cache lines, correlates the detected repeated bit pattern of data corruption to one of a plurality of domains of the memory subsystem, and applies the ECC algorithm to erase bits associated with the detected repeated bit pattern from cache lines retrieved from the correlated domain of the memory subsystem.

    摘要翻译: 一种用于控制在存储器子系统中应用纠错码(ECC)算法的擦除模式的方法包括使用ECC算法检测从存储器子系统检索的高速缓存行中的错误。 该方法还分析错误以检测高速缓存行内的数据损坏的重复比特模式,将检测到的数据损坏的重复比特模式与存储器子系统的多个域之一相关联,并将ECC算法应用于擦除与 从存储器子系统的相关域检索的来自高速缓存行的检测到的重复位模式。

    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem
    6.
    发明授权
    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem 有权
    用于在存储器子系统中控制纠错码(ECC)算法的应用的系统和方法

    公开(公告)号:US07308638B2

    公开(公告)日:2007-12-11

    申请号:US10879255

    申请日:2004-06-29

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1012

    摘要: In one embodiment, a computer readable medium comprises code for recording occurrences of data corruption in data retrieved from a memory subsystem, code for determining whether bit locations within the memory subsystem are associated with multiple occurrences of data corruption, code for deallocating, in response to the code for determining, memory regions containing bit locations associated with multiple occurrences of data corruption, code for analyzing patterns of data corruption repeated across multiple addresses of the memory subsystem, and code for controlling application of an error correction code (ECC) algorithm by the memory subsystem to erase bits associated with a repeated bit pattern, detected by the code for analyzing, from data retrieved from the memory subsystem.

    摘要翻译: 在一个实施例中,计算机可读介质包括用于在从存储器子系统检索的数据中记录数据损坏的发生的代码,用于确定存储器子系统内的位位置是否与多次数据损坏相关联的代码,以及响应于 用于确定的代码,包含与多次数据损坏相关联的位位置的存储器区域,用于分析在存储器子系统的多个地址上重复的数据损坏模式的代码,以及用于控制由所述存储器子系统的多个地址应用纠错码(ECC)算法的代码 存储器子系统从从存储器子系统检索的数据中擦除与用于分析的代码检测的重复位模式相关联的位。

    Method and system for dynamically adjusting DRAM refresh rate
    7.
    发明申请
    Method and system for dynamically adjusting DRAM refresh rate 有权
    动态调整DRAM刷新率的方法和系统

    公开(公告)号:US20060085616A1

    公开(公告)日:2006-04-20

    申请号:US10969662

    申请日:2004-10-20

    IPC分类号: G06F13/00

    摘要: One embodiment is a method of dynamically adjusting a rate at which a dynamic random access memory (“DRAM”) module is refreshed in a computer system. The method comprises monitoring a plurality of system conditions; detecting a change in at least one of the monitored system conditions; responsive to the detection, determining an optimum refresh rate for a current state of the computer system; and setting the refresh rate to the determined optimum refresh rate.

    摘要翻译: 一个实施例是动态地调整在计算机系统中刷新动态随机存取存储器(“DRAM”)模块的速率的方法。 该方法包括监视多个系统状况; 检测所监测的系统条件中的至少一个的变化; 响应于所述检测,确定所述计算机系统的当前状态的最佳刷新率; 并将刷新率设置为所确定的最佳刷新率。

    KITS FOR MULTIPARAMETRIC PHOSPHO ANALYSIS
    8.
    发明申请
    KITS FOR MULTIPARAMETRIC PHOSPHO ANALYSIS 审中-公开
    多功能磷光体分析仪

    公开(公告)号:US20120276558A1

    公开(公告)日:2012-11-01

    申请号:US13544053

    申请日:2012-07-09

    IPC分类号: G01N33/53

    摘要: As disclosed herein, the present invention provides for kits and a composition for diagnosis, prognosis, drug discovery, drug development, and patient stratification. The kits can comprise a plurality of binding elements for cell surface markers, and a plurality of binding elements for state-specific intracellular markers. The kits can further comprise a plurality of modulators directed for the particular cell function or signaling pathways. The kits can further include fixatives, permeabilizing agent, buffers, containers, instructions, and software for data analysis/compilation.

    摘要翻译: 如本文所公开的,本发明提供用于诊断,预后,药物发现,药物开发和患者分层的试剂盒和组合物。 试剂盒可以包含用于细胞表面标记的多个结合元件,以及用于状态特异性细胞内标记物的多个结合元件。 试剂盒还可以包含针对特定细胞功能或信号传导途径的多个调节剂。 试剂盒还可以包括固定剂,渗透剂,缓冲液,容器,说明书和用于数据分析/汇编的软件。

    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem
    9.
    发明申请
    System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem 有权
    用于在存储器子系统中控制纠错码(ECC)算法的应用的系统和方法

    公开(公告)号:US20050289439A1

    公开(公告)日:2005-12-29

    申请号:US10879255

    申请日:2004-06-29

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1012

    摘要: In one embodiment, a computer readable medium comprises code for recording occurrences of data corruption in data retrieved from a memory subsystem, code for determining whether bit locations within the memory subsystem are associated with multiple occurrences of data corruption, code for deallocating, in response to the code for determining, memory regions containing bit locations associated with multiple occurrences of data corruption, code for analyzing patterns of data corruption repeated across multiple addresses of the memory subsystem, and code for controlling application of an error correction code (ECC) algorithm by the memory subsystem to erase bits associated with a repeated bit pattern, detected by the code for analyzing, from data retrieved from the memory subsystem.

    摘要翻译: 在一个实施例中,计算机可读介质包括用于在从存储器子系统检索的数据中记录数据损坏的发生的代码,用于确定存储器子系统内的位位置是否与多次数据损坏相关联的代码,以及响应于 用于确定的代码,包含与多次数据损坏相关联的位位置的存储器区域,用于分析在存储器子系统的多个地址上重复的数据损坏模式的代码,以及用于控制由所述存储器子系统的多个地址应用纠错码(ECC)算法的代码 存储器子系统从从存储器子系统检索的数据中擦除与用于分析的代码检测的重复位模式相关联的位。

    System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table
    10.
    发明申请
    System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table 有权
    用于应用纠错码(ECC)擦除模式的系统和方法,并从页面解除分配表中清除记录的信息

    公开(公告)号:US20050289402A1

    公开(公告)日:2005-12-29

    申请号:US10879643

    申请日:2004-06-29

    IPC分类号: G06F11/00 G06F11/10

    CPC分类号: G06F11/1064

    摘要: In one embodiment, a system comprises non-volatile memory storing a page deallocation table (PDT), a memory controller for storing and retrieving data from a memory subsystem, the memory controller using an error correction code (ECC) algorithm to correct data corruption in retrieved data, a processor for executing an error analysis algorithm, the error analysis algorithm recording instances of data corruption in the PDT, deallocating memory regions associated with multiple occurrences of data corruption at single bit locations, the error analysis algorithm causing the memory controller to apply an erasure mode of the ECC algorithm upon detection of a repeated pattern of data corruption across different addresses of the memory subsystem, and removing entries in the PDT that correspond to data corruption addressed by application of the erasure mode.

    摘要翻译: 在一个实施例中,系统包括存储页面解除分配表(PDT)的非易失性存储器,用于从存储器子系统存储和检索数据的存储器控​​制器,存储器控制器使用纠错码(ECC)算法来校正数据损坏 检索数据,用于执行错误分析算法的处理器,记录PDT中的数据损坏实例的错误分析算法,在单个位置释放与多次数据损坏相关联的存储器区域,使得存储器控制器应用的误差分析算法 ECC算法的擦除模式,当检测到在存储器子系统的不同地址上重复的数据损坏模式时,以及删除对应于通过应用擦除模式解决的数据损坏的PDT中的条目。