知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

11 records (took 0.025 seconds)

    Network interface device with 10 Gb/s full-duplex transfer rate
    2.
    发明申请
    Network interface device with 10 Gb/s full-duplex transfer rate 审中-公开
    具有10 Gb / s全双工传输速率的网络接口设备

    公开(公告)号：US20080040519A1

    公开(公告)日：2008-02-14

    申请号：US11799720

    申请日：2007-05-01

    Applicant: Daryl Starr ,  Clive Philbrick ,  Colin Sharp

    Inventor： Daryl Starr ,  Clive Philbrick ,  Colin Sharp

    IPC: G06F3/00

    CPC classification number: H04L69/16 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9063 ,  H04L69/161 ,  H04L69/163

    Abstract: A 10 Gb/s network interface device offloads TCP/IP datapath functions. Frames without IP datagrams are processed as with a non-offload NIC. Receive frames are filtered, then transferred to preallocated receive buffers within host memory. Outbound frames are retrieved from host memory, then transmitted. Frames with IP datagrams without TCP segments are transmitted without any protocol offload, but received frames are parsed and checked for protocol errors, including checksum accumulation for UDP segments. Receive frames without datagram errors are passed to the host and error frames are dumped. Frames with Tcp segments are parsed and error-checked. Hardware checking is performed for ownership of the socket state. TCP/IP frames which fail the ownership test are passed to the host system with a parsing summary. TCP/IP frames which pass the ownership test are processed by a finite state machine implemented by the CPU. TCP/IP frames for non-owned sockets are supported with checksum accumulation/insertion.

    Abstract translation: 10 Gb / s网络接口设备卸载TCP / IP数据路径功能。 没有IP数据报的帧与非卸载NIC一样处理。 接收帧被过滤，然后传输到主机内存中的预先分配的接收缓冲区。 出站帧从主机内存中检索，然后发送。 在没有任何协议卸载的情况下传输具有不带TCP段的IP数据报的帧，但是对于接收的帧进行解析并检查协议错误，包括UDP段的校验和累积。 没有数据报错误的接收帧被传递给主机，并且丢弃错误帧。 具有Tcp段的帧被解析并进行错误检查。 对套接字状态的所有权执行硬件检查。 将所有权测试失败的TCP / IP帧传递到具有解析摘要的主机系统。 通过所有权测试的TCP / IP帧由CPU实现的有限状态机处理。 校验和累积/插入支持非拥有套接字的TCP / IP帧。

    TCP/IP offload device with fast-path TCP ACK generating and transmitting mechanism
    3.
    发明申请
    TCP/IP offload device with fast-path TCP ACK generating and transmitting mechanism 有权
    TCP / IP卸载设备，具有快速TCP ACK生成和传输机制

    公开(公告)号：US20070118665A1

    公开(公告)日：2007-05-24

    申请号：US11656809

    申请日：2007-01-22

    Applicant: Clive Philbrick ,  Laurence Boucher ,  Stephen Blightman ,  Peter Craft ,  David Higgen ,  Daryl Starr

    Inventor： Clive Philbrick ,  Laurence Boucher ,  Stephen Blightman ,  Peter Craft ,  David Higgen ,  Daryl Starr

    IPC: G06F15/16

    CPC classification number: H04L67/325 ,  H04L29/06 ,  H04L49/90 ,  H04L49/901 ,  H04L67/327 ,  H04L69/08 ,  H04L69/12 ,  H04L69/16 ,  H04L69/161 ,  H04L69/163 ,  H04L69/166 ,  H04L69/22 ,  H04L69/32

    Abstract: A network interface device has a fast-path ACK generating and transmitting mechanism. ACKs are generated using a finite state machine (FSM). The FSM retrieves a template header and fills in TCP and IP fields in the template. The FSM is not a stack, but rather fills in the TCP and IP fields without performing transport layer processing and network layer processing sequentially as separate tasks. The filled-in template is placed into a buffer and a pointer to the buffer is pushed onto a high-priority transmit queue. Pointers for ordinary data packets are pushed onto a low-priority transmit queue. A transmit sequencer outputs a packet by popping a transmit queue, obtaining a pointer, and causing information pointed to by the pointer to be output from the network interface device as a packet. The sequencer pops the high-priority queue in preference to the low-priority queue, thereby accelerating ACK generation and transmission.

    Abstract translation: 网络接口设备具有快速路径ACK生成和发送机制。 使用有限状态机（FSM）生成ACK。 FSM检索模板标题并填写模板中的TCP和IP字段。 FSM不是堆栈，而是填充TCP和IP字段，而不是按照单独的任务执行传输层处理和网络层处理。 将填充的模板放入缓冲区，并将指向缓冲区的指针推送到高优先级的传输队列中。 普通数据包的指针被推送到低优先级的发送队列。 发送定序器通过弹出发送队列输出分组，获得指针，并且使由指针指向的信息作为分组从网络接口设备输出。 定序器优先于低优先级队列，弹出高优先级队列，从而加速了ACK生成和传输。

    TCP/IP offload network interface device
    7.
    发明申请
    TCP/IP offload network interface device 有权

    公开(公告)号：US20070136495A1

    公开(公告)日：2007-06-14

    申请号：US11701705

    申请日：2007-02-02

    Applicant: Laurence Boucher ,  Stephen Blightman ,  Peter Craft ,  David Higgen ,  Clive Philbrick ,  Daryl Starr

    Inventor： Laurence Boucher ,  Stephen Blightman ,  Peter Craft ,  David Higgen ,  Clive Philbrick ,  Daryl Starr

    IPC: G06F15/16

    CPC classification number: H04L29/06 ,  H04L69/16 ,  H04L69/161 ,  H04L69/162 ,  H04L69/163 ,  H04L69/166 ,  H04L69/32

    Abstract: A system for protocol processing in a computer network has a TCP/IP Offload Network Interface Device (TONID) associated with a host computer. The TONID provides a fast-path that avoids protocol processing for most large multi-packet messages, greatly accelerating data communication. The TONID also assists the host for those message packets that are chosen for processing by host software layers. A communication control block for a message is defined that allows DMA controllers of the TONID to move data, free of headers, directly to or from a destination or source in the host. The context is stored in the TONID as a communication control block (CCB) that can be passed back to the host for message processing by the host. The TONID contains specialized hardware circuits that are much faster at their specific tasks than a general purpose CPU. A preferred embodiment includes a trio of pipelined processors with separate processors devoted to transmit, receive and management processing, with full duplex communication for four fast Ethernet nodes.

    TCP/IP offload device with reduced sequential processing
    9.
    发明申请
    TCP/IP offload device with reduced sequential processing 有权
    TCP / IP卸载设备减少了顺序处理

    公开(公告)号：US20050122986A1

    公开(公告)日：2005-06-09

    申请号：US10729111

    申请日：2003-12-05

    Applicant: Daryl Starr ,  Clive Philbrick

    Inventor： Daryl Starr ,  Clive Philbrick

    IPC: H04L12/56 ,  H04L29/06 ,  H04L29/08 ,  H04Q20060101

    CPC classification number: H04L69/16 ,  H04L69/12 ,  H04L69/161

    Abstract: A TCP Offload Engine (TOE) device includes a state machine that performs TCP/IP protocol processing operations in parallel. In a first aspect, the state machine includes a first memory, a second memory, and combinatorial logic. The first memory stores and simultaneously outputs multiple TCP state variables. The second memory stores and simultaneously outputs multiple header values. In contrast to a sequential processor technique, the combinatorial logic generates a flush detect signal from the TCP state variables and header values without performing sequential processor instructions or sequential memory accesses. In a second aspect, a TOE includes a state machine that performs an update of multiple TCP state variables in a TCB buffer all simultaneously, thereby avoiding multiple sequential writes to the TCB buffer memory. In a third aspect, a TOE involves a state machine that sets up a DMA move in a single state machine clock cycle.

    Abstract translation: TCP卸载引擎（TOE）设备包括并行执行TCP / IP协议处理操作的状态机。 在第一方面，状态机包括第一存储器，第二存储器和组合逻辑。 第一个内存存储并同时输出多个TCP状态变量。 第二个存储器同时输出多个标题值。 与顺序处理器技术相反，组合逻辑从TCP状态变量和报头值生成刷新检测信号，而不执行顺序处理器指令或顺序存储器访问。 在第二方面，TOE包括同时执行TCB缓冲器中的多个TCP状态变量的更新的状态机，从而避免对TCB缓冲存储器的多次顺序写入。 在第三方面，TOE涉及在单个状态机时钟周期中建立DMA移动的状态机。

    TCP/IP offload device with reduced sequential processing
    10.
    发明申请
    TCP/IP offload device with reduced sequential processing 审中-公开

    公开(公告)号：US20060168281A1

    公开(公告)日：2006-07-27

    申请号：US11348810

    申请日：2006-02-06

    Applicant: Daryl Starr ,  Clive Philbrick

    Inventor： Daryl Starr ,  Clive Philbrick

    IPC: G06F15/16

    CPC classification number: H04L69/16 ,  H04L69/12 ,  H04L69/161

    Abstract: A TCP Offload Engine (TOE) device includes a state machine that performs TCP/IP protocol processing operations in parallel. In a first aspect, the state machine includes a first memory, a second memory, and combinatorial logic. The first memory stores and simultaneously outputs multiple TCP state variables. The second memory stores and simultaneously outputs multiple header values. In contrast to a sequential processor technique, the combinatorial logic generates a flush detect signal from the TCP state variables and header values without performing sequential processor instructions or sequential memory accesses. In a second aspect, a TOE includes a state machine that performs an update of multiple TCP state variables in a TCB buffer all simultaneously, thereby avoiding multiple sequential writes to the TCB buffer memory. In a third aspect, a TOE involves a state machine that sets up a DMA move in a single state machine clock cycle.

Patent Agency Ranking