公开(公告)号：US6113690A

公开(公告)日：2000-09-05

申请号：US93081

申请日：1998-06-08

Applicant: Zhiyi Jimmy Yu ,  Jerald A. Hallmark ,  Jonathan K. Abrokwah ,  Corey D. Overgaard ,  Ravi Droopad

Inventor： Zhiyi Jimmy Yu ,  Jerald A. Hallmark ,  Jonathan K. Abrokwah ,  Corey D. Overgaard ,  Ravi Droopad

IPC: C30B23/02 ,  C30B25/02

CPC classification number: C30B23/02 ,  C30B29/16 ,  C30B29/22

Abstract: A method of preparing crystalline alkaline earth metal oxides on a Si substrate wherein a Si substrate with amorphous silicon dioxide on a surface is provided. The substrate is heated to a temperature in a range of 700.degree. C. to 800.degree. C. and exposed to a beam of alkaline earth metal(s) in a molecular beam epitaxy chamber at a pressure within approximately a 10.sup.-9 -10.sup.-10 Torr range. During the molecular beam epitaxy the surface is monitored by RHEED technique to determine a conversion of the amorphous silicon dioxide to a crystalline alkaline earth metal oxide. Once the alkaline earth metal oxide is formed, additional layers of material, e.g. additional thickness of an alkaline earth metal oxide, single crystal ferroelectrics or high dielectric constant oxides on silicon for non-volatile and high density memory device applications.

Abstract translation: 在Si衬底上制备结晶碱土金属氧化物的方法，其中提供了表面上具有无定形二氧化硅的Si衬底。 将基底加热至700℃至800℃的温度，并在分子束外延室内以大约10-9-10℃的压力暴露于一束或多束碱土金属， 10乇范围。 在分子束外延期间，通过RHEED技术监测表面以确定无定形二氧化硅向结晶碱土金属氧化物的转化。 一旦形成碱土金属氧化物，可以使用另外的材料层。 用于非易失性和高密度存储器件应用的碱土金属氧化物，单晶铁电体或硅上的高介电常数氧化物的附加厚度。

公开(公告)号：US6030453A

公开(公告)日：2000-02-29

申请号：US812950

申请日：1997-03-04

Applicant: Matthias Passlack ,  Jonathan K. Abrokwah ,  Ravi Droopad ,  Corey D. Overgaard

Inventor： Matthias Passlack ,  Jonathan K. Abrokwah ,  Ravi Droopad ,  Corey D. Overgaard

IPC: H01L21/205 ,  H01L21/02 ,  H01L21/31 ,  H01L21/316 ,  C30B23/02

CPC classification number: H01L21/31604

Abstract: A production process for protecting the surface of compound semiconductor wafers includes providing a multi-wafer epitaxial production system with a transfer and load module, a III-V growth chamber and an insulator chamber. The wafer is placed in the transfer and load module and the pressure is reduced to .ltoreq.10.sup.-10 Torr, after which the wafer is moved to the III-V growth chamber and layers of compound semiconductor material are epitaxially grown on the surface of the wafer. The wafer is then moved through the transfer and load module to the insulator chamber and an insulating cap layer is formed by thermally evaporating gallium oxide molecules from an effusion cell using an evaporation source in an oxide crucible, which oxide crucible does not form an eutectic alloy with the evaporation source

Abstract translation: 用于保护化合物半导体晶片的表面的制造方法包括提供具有传输和负载模块，III-V生长室和绝缘体室的多晶片外延生产系统。 将晶片放置在传送和加载模块中，并将压力降低到10-10托，之后将晶片移动到III-V生长室，并且将化合物半导体材料层外延生长在 晶圆。 然后将晶片通过传输和负载模块移动到绝缘体室，并且通过使用氧化物坩埚中的蒸发源从渗出电池热蒸发氧化镓分子而形成绝缘盖层，该氧化物坩埚不形成共晶合金 与蒸发源

公开(公告)号：US5937285A

公开(公告)日：1999-08-10

申请号：US863109

申请日：1997-05-23

Applicant: Jonathan K. Abrokwah ,  Ravi Droopad ,  Corey D. Overgaard ,  Brian Bowers ,  Michael P. LaMacchia ,  Bruce A. Bernhardt

Inventor： Jonathan K. Abrokwah ,  Ravi Droopad ,  Corey D. Overgaard ,  Brian Bowers ,  Michael P. LaMacchia ,  Bruce A. Bernhardt

IPC: H01L21/20 ,  H01L21/335 ,  H01L21/8252 ,  H01L29/80

CPC classification number: H01L29/802 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02546 ,  H01L21/02631 ,  H01L21/8252 ,  H01L29/66462

Abstract: A method of fabricating submicron HFETs includes forming a buffered substrate structure with a supporting substrate of GaAs, a portion of low temperature AlGaAs grown on the supporting substrate at a temperature of approximately 300.degree. C., a layer of low temperature GaAs grown on the portion AlGaAs layer at a temperature of 200.degree. C., a layer of low temperature AlGaAs grown on the GaAs layer at a temperature of 400.degree. C., and a buffer layer of undoped GaAs grown on the second AlGaAs layer. Complementary pairs of HFETs can be formed on the buffered substrate structure, since the structure supports the operation of p and n type transistors equally well.

Abstract translation: 制造亚微米HFET的方法包括用GaAs的支撑衬底形成缓冲衬底结构，在约300℃的温度下在支撑衬底上生长一部分低温AlGaAs，在该部分生长的低温GaAs层 AlGaAs层，在400℃的温度下在GaAs层上生长的低温AlGaAs层和在第二AlGaAs层上生长的未掺杂的GaAs的缓冲层。 可以在缓冲衬底结构上形成互补的HFET对，因为该结构同样良好地支持p型和n型晶体管的操作。

公开(公告)号：US6110840A

公开(公告)日：2000-08-29

申请号：US24148

申请日：1998-02-17

Applicant: Zhiyi Jimmy Yu ,  Corey D. Overgaard ,  Ravi Droopad ,  Jonathan K. Abrokwah ,  Jerald A. Hallmark

Inventor： Zhiyi Jimmy Yu ,  Corey D. Overgaard ,  Ravi Droopad ,  Jonathan K. Abrokwah ,  Jerald A. Hallmark

IPC: C23C14/02 ,  C23C14/16 ,  H01L21/285 ,  H01L21/306 ,  H01L21/31

CPC classification number: B82Y30/00 ,  C23C14/021 ,  C23C14/16 ,  H01L21/28518 ,  H01L21/02043

Abstract: A method of passivating the surface of a Si wafer is disclosed including the steps of cleaning the surface of the Si wafer and depositing an alkaline earth metal on the clean surface at a wafer temperature in a range of approximately 400.degree. C. to 750.degree. C. The surface is monitored during deposition to detect a (4.times.2) surface reconstruction pattern indicating approximately a one-quarter monolayer of alkaline earth metal is formed. The wafer is annealed at a temperature in a range of 800.degree. C. to 900.degree. C. until the alkaline earth metal forms an alkaline earth metal silicide with a (2.times.1) surface pattern on the surface.

Abstract translation: 公开了一种钝化Si晶片的表面的方法，包括以下步骤：在大约400℃至750℃的晶圆温度下清洁Si晶片的表面并在清洁表面上沉积碱土金属 在沉积期间监测表面以检测（4×2）表面重建图案，其指示形成大约四分之一的碱土金属单层。 将晶片在800℃至900℃的温度下进行退火，直到碱土金属在表面上形成具有（2x1）表面图案的碱土金属硅化物。