公开(公告)号：US07430727B2

公开(公告)日：2008-09-30

申请号：US11440065

申请日：2006-05-25

申请人： Fu-Chiung Cheng ,  Shu-Ming Chang ,  Jian-Yi Chen ,  Chieh-Ju Wang ,  Chin-Tai Chou ,  Nian-Zhi Huang ,  Chi-Huam Shieh ,  Ping-Yun Wang ,  Li-Kai Chang

发明人： Fu-Chiung Cheng ,  Shu-Ming Chang ,  Jian-Yi Chen ,  Chieh-Ju Wang ,  Chin-Tai Chou ,  Nian-Zhi Huang ,  Chi-Huam Shieh ,  Ping-Yun Wang ,  Li-Kai Chang

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： An HCG to HDL translation method, which can automatically generate VHDL codes. The method reads a hardware component graph (HCG) to find a start node and obtain a corresponding hardware component subgraph of the start node, analyzes all information of the start node to thereby add input and output components and generate a VHDL entity, determines types on all nodes of the hardware component, graph to thereby generate corresponding VHDL components and write associated information in a VHDL architecture, generates corresponding signal connections of VHDL components in accordance with edges of the hardware component graph, and outputs the VHDL entity and architecture to a file in a text form.

摘要翻译： 一种HCG到HDL的翻译方法，可以自动生成VHDL代码。 该方法读取硬件组件图（HCG）以找到起始节点并获取起始节点的相应硬件组件子图，分析起始节点的所有信息，从而添加输入和输出组件并生成VHDL实体，确定类型 硬件组件的所有节点图形，从而生成对应的VHDL组件并在VHDL架构中写入关联信息，根据硬件组件图的边缘生成VHDL组件的相应信号连接，并将VHDL实体和体系结构输出到文件 以文本形式。

公开(公告)号：US20070157147A1

公开(公告)日：2007-07-05

申请号：US11440065

申请日：2006-05-25

申请人： Fu-Chiung Cheng ,  Shu-Ming Chang ,  Jian-Yi Chen ,  Chieh-Ju Wang ,  Chin-Tai Chou ,  Nian-Zhi Huang ,  Chi-Huam Shieh ,  Ping-Yun Wang ,  Li-Kai Chang

发明人： Fu-Chiung Cheng ,  Shu-Ming Chang ,  Jian-Yi Chen ,  Chieh-Ju Wang ,  Chin-Tai Chou ,  Nian-Zhi Huang ,  Chi-Huam Shieh ,  Ping-Yun Wang ,  Li-Kai Chang

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： An HCG to HDL translation method, which can automatically generate VHDL codes. The method reads a hardware component graph (HCG) to find a start node and obtain a corresponding hardware component subgraph of the start node, analyzes all information of the start node to thereby add input and output components and generate a VHDL entity, determines types on all nodes of the hardware component, graph to thereby generate corresponding VHDL components and write associated information in a VHDL architecture, generates corresponding signal connections of VHDL components in accordance with edges of the hardware component graph, and outputs the VHDL entity and architecture to a file in a text form.

摘要翻译： 一种HCG到HDL的翻译方法，可以自动生成VHDL代码。 该方法读取硬件组件图（HCG）以找到起始节点并获取起始节点的相应硬件组件子图，分析起始节点的所有信息，从而添加输入和输出组件并生成VHDL实体，确定类型 硬件组件的所有节点图形，从而生成对应的VHDL组件并在VHDL架构中写入关联信息，根据硬件组件图的边缘生成VHDL组件的相应信号连接，并将VHDL实体和体系结构输出到文件 以文本形式。

公开(公告)号：US20090142931A1

公开(公告)日：2009-06-04

申请号：US11946875

申请日：2007-11-29

申请人： Chieh-Ju Wang ,  Jyh-Cherng Yau ,  Yu-Tsung Lai ,  Jiunn-Hsiung Liao

发明人： Chieh-Ju Wang ,  Jyh-Cherng Yau ,  Yu-Tsung Lai ,  Jiunn-Hsiung Liao

IPC分类号： H01L21/461 ,  C23F1/12

CPC分类号： H01L21/02063 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814

摘要： A cleaning method following an opening etching is provided. First, a semiconductor substrate having a dielectric layer is provided. The hard mask layer includes at least a metal layer. The opening etch is then carried out to form at least an opening in the dielectric layer. A nitrogen (N2) treatment process is performed to clean polymer residues having carbon-fluorine (C—F) bonds remained in the opening. Finally, a wet cleaning process is performed.

摘要翻译： 提供了开口蚀刻后的清洁方法。 首先，提供具有电介质层的半导体基板。 硬掩模层至少包括金属层。 然后进行开口蚀刻以形成电介质层中的至少一个开口。 进行氮（N2）处理工艺以清洁残留在开口中的具有碳 - 氟（C-F）键的聚合物残基。 最后，进行湿式清洗处理。

公开(公告)号：US08282842B2

公开(公告)日：2012-10-09

申请号：US11946875

申请日：2007-11-29

申请人： Chieh-Ju Wang ,  Jyh-Cherng Yau ,  Yu-Tsung Lai ,  Jiunn-Hsiung Liao

发明人： Chieh-Ju Wang ,  Jyh-Cherng Yau ,  Yu-Tsung Lai ,  Jiunn-Hsiung Liao

IPC分类号： H01B13/00

CPC分类号： H01L21/02063 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814

摘要： A cleaning method following an opening etching is provided. First, a semiconductor substrate having a dielectric layer is provided. The hard mask layer includes at least a metal layer. The opening etch is then carried out to form at least an opening in the dielectric layer. A nitrogen (N2) treatment process is performed to clean polymer residues having carbon-fluorine (C—F) bonds remained in the opening. Finally, a wet cleaning process is performed.

摘要翻译： 提供了开口蚀刻后的清洁方法。 首先，提供具有电介质层的半导体基板。 硬掩模层至少包括金属层。 然后进行开口蚀刻以形成电介质层中的至少一个开口。 进行氮（N2）处理工艺以清洁残留在开口中的具有碳 - 氟（C-F）键的聚合物残基。 最后，进行湿式清洗处理。

公开(公告)号：US20100018944A1

公开(公告)日：2010-01-28

申请号：US12179879

申请日：2008-07-25

申请人： Yu-Tsung Lai ,  Shih-Chang Chang ,  Chieh-Ju Wang ,  Jyh-Cherng Yau ,  Jiunn-Hsiung Liao

发明人： Yu-Tsung Lai ,  Shih-Chang Chang ,  Chieh-Ju Wang ,  Jyh-Cherng Yau ,  Jiunn-Hsiung Liao

IPC分类号： H01B13/00

CPC分类号： H01L21/31144 ,  H01L21/0273 ,  H01L21/31116 ,  H01L21/31138

摘要： A patterning method is provided. A patterned photoresist layer is formed on a bottom anti-reflective coating (BARC), having therein an opening exposing a portion of the BARC. The patterned photoresist layer is treated with a first plasma-generating gas including a fluorocarbon species to form a polymer layer on the surface of the PR layer and the sidewall of the opening. The patterned photoresist layer is used as a mask to etch the BARC with a second plasma-generating gas, which includes Ar and H2 but no fluorocarbon species or oxygen-containing species, to remove the exposed portion of the BARC.

摘要翻译： 提供了图案化方法。 在底部抗反射涂层（BARC）上形成图案化的光致抗蚀剂层，其中具有露出BARC的一部分的开口。 图案化的光致抗蚀剂层用包括碳氟化合物种的第一等离子体产生气体处理，以在PR层的表面和开口的侧壁上形成聚合物层。 图案化的光致抗蚀剂层用作掩模以具有第二等离子体产生气体（其包括Ar和H 2，但不含碳氟物质或含氧物质）来蚀刻BARC以去除BARC的暴露部分。

公开(公告)号：US20070157132A1

公开(公告)日：2007-07-05

申请号：US11472365

申请日：2006-06-22

申请人： Fu-Chiung Cheng ,  Jian-Yi Chen ,  Kuan-Yu Yan ,  Shin-Hway Yu ,  Kuan-Yu Chen ,  Chieh-Ju Wang ,  Shu-Ming Chang ,  Ping-Yun Wang ,  Li-Kai Chang ,  Chin-Tai Chou ,  Chi-Huam Shieh ,  Ming-Shiou Chiang ,  Nian-Zhi Huang ,  Hung-Chi Wu

发明人： Fu-Chiung Cheng ,  Jian-Yi Chen ,  Kuan-Yu Yan ,  Shin-Hway Yu ,  Kuan-Yu Chen ,  Chieh-Ju Wang ,  Shu-Ming Chang ,  Ping-Yun Wang ,  Li-Kai Chang ,  Chin-Tai Chou ,  Chi-Huam Shieh ,  Ming-Shiou Chiang ,  Nian-Zhi Huang ,  Hung-Chi Wu

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5045

摘要： A process of automatically translating a high level programming language into a hardware description language (HDL), which can use a three-stage translation mechanism to generate the HDL codes corresponding to the functions described by the high level programming language. The first stage translates source codes coded by the high level programming language into an extended activity diagram (EAD). The second stage translates the EAD into a hardware component graph (HCG). The third stage generates the respective signal connections of HDL components according to all edges of the HCG, and outputs an HDL entity and architecture to a file in a string form, thereby completing the entire translation.

摘要翻译： 自动将高级编程语言翻译成硬件描述语言（HDL）的过程，其可以使用三级转换机制来生成与由高级编程语言描述的功能相对应的HDL代码。 第一阶段将由高级编程语言编码的源代码转换为扩展活动图（EAD）。 第二阶段将EAD转换为硬件组件图（HCG）。 第三阶段根据HCG的所有边缘生成HDL组件的相应信号连接，并将HDL实体和体系结构输出到字符串形式的文件，从而完成整个翻译。