公开(公告)号：US07027243B2

公开(公告)日：2006-04-11

申请号：US10811523

申请日：2004-03-29

申请人： Chad E. Mitchell ,  Vicki L. Pipal ,  Joey M. Poss ,  Raymond A. Richetta

发明人： Chad E. Mitchell ,  Vicki L. Pipal ,  Joey M. Poss ,  Raymond A. Richetta

IPC分类号： G11B5/09

CPC分类号： G11B20/10009

摘要： An apparatus for providing head amplitude characterization is disclosed. A DAC is used to apply known signals to a variable gain amplifier in the front end of a read channel. The signal is processed through the read channel and at the output of an ADC, the signal is read and used to determine the input channel amplitude. Knowing the amplitude of the two input signals, the ADC code spread and the two VGA gain codes, an equation is generated for determining the amplitude of a head.

摘要翻译： 公开了一种用于提供头振幅表征的装置。 DAC用于将已知信号应用于读通道前端的可变增益放大器。 该信号通过读通道和ADC的输出进行处理，该信号被读取并用于确定输入通道幅度。 了解两个输入信号的幅度，ADC代码扩展和两个VGA增益代码，生成一个用于确定磁头幅度的方程式。

公开(公告)号：US07027245B2

公开(公告)日：2006-04-11

申请号：US10837275

申请日：2004-04-30

申请人： Chad E. Mitchell ,  Vicki L. Pipal ,  Joey M. Poss ,  Raymond A. Richetta

发明人： Chad E. Mitchell ,  Vicki L. Pipal ,  Joey M. Poss ,  Raymond A. Richetta

IPC分类号： G11B5/09

CPC分类号： G11B20/10055 ,  G11B20/10009 ,  G11B20/10027

摘要： An apparatus for providing head amplitude characterization using gain loops is disclosed. A variable gain amplifier (VGA) receiving input signals and generates a VGA output signal. A digital-to-analog converter (DAC) circuit provides a desired input signal to the VGA and a gain control loop drives the VGA to gain lock the VGA to the provided desired input signal. An analog-to-digital converter (ADC) provides a digital output representing an ADC code spread in response to the VGA output. A controller drives the DAC to provide the desired input signal to the VGA and generates control signals for controlling the ADC, the controller further determines read head channel amplitude based upon the signal provided to the DAC, the ADC code spread received from the ADC and gain code provided by the gain control loops.

摘要翻译： 公开了一种使用增益环提供磁头幅度表征的装置。 一个可变增益放大器（VGA）接收输入信号并产生VGA输出信号。 数模转换器（DAC）电路向VGA提供所需的输入信号，增益控制环驱动VGA以将VGA锁定到所需的输入信号。 模数转换器（ADC）提供表示响应于VGA输出的ADC代码扩展的数字输出。 控制器驱动DAC以向VGA提供所需的输入信号，并产生用于控制ADC的控制信号，控制器还根据提供给DAC的信号，从ADC接收的ADC代码扩展和增益确定读取头信道幅度 由增益控制回路提供的代码。

公开(公告)号：US06603416B2

公开(公告)日：2003-08-05

申请号：US09968218

申请日：2001-10-01

申请人： Charles J. Masenas ,  Chad E. Mitchell ,  Steven J. Tanghe ,  Sharon L. Von Bruns

发明人： Charles J. Masenas ,  Chad E. Mitchell ,  Steven J. Tanghe ,  Sharon L. Von Bruns

IPC分类号： H03M112

CPC分类号： H03M1/1033 ,  H03M1/36

摘要： A method and structure for calibrating an analog to digital converter comprises an input signal; a driver receiving the input signal, wherein the driver outputs a driver output signal; a flash circuit receiving the driver output signal, wherein the flash circuit outputs a comparison result equaling 2n−1 digital outputs; an encoding logic unit encoding the comparison result into n digital bits as an output signal; a calibration engine outputting a calibration input adjust signal, a reference adjust signal, a driver gain adjust signal, a driver offset adjust signal; and a calibration input circuit receiving the calibration input adjust signal, wherein the driver receives the driver gain adjust signal and the driver offset adjust signal, wherein the flash circuit receives the reference adjust signal, wherein the calibration engine receives n digital bits, and controls an operation of the driver or flash circuit based on the output signal.

摘要翻译： 用于校准模数转换器的方法和结构包括输入信号; 接收所述输入信号的驱动器，其中所述驱动器输出驱动器输出信号; 接收驱动器输出信号的闪光电路，其中闪光电路输出等于2n-1个数字输出的比较结果; 编码逻辑单元，将比较结果编码为n个数字位作为输出信号; 输出校准输入调整信号的校准引擎，基准调整信号，驾驶员增益调整信号，驾驶员偏移调整信号; 以及校准输入电路，其接收所述校准输入调整信号，其中所述驾驶员接收所述驾驶员增益调整信号和所述驾驶员偏移调整信号，其中所述闪光电路接收所述参考调整信号，其中所述校准引擎接收n个数字位， 基于输出信号对驱动器或闪存电路进行操作。