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公开(公告)号：US07495484B1
公开(公告)日：2009-02-24
申请号：US11830445
申请日：2007-07-30
IPC分类号： H03B19/06
CPC分类号： H03D7/00
摘要： A programmable frequency multiplier device which includes a frequency doubler section configured to receive an input signal having a frequency f, and to output doubled signals, each of the doubled signals having a frequency 2n×f (n=0, 1, 2, . . . ); a selector section configured to select a plurality of the doubled signals output from the frequency doubler section, and to output the plurality of the selected doubled signals as selected signals; and a frequency summation section configured to multiply the selected signals, and to output a multiplied signal having a frequency fout=f×(m020+m121+ . . . +mk2k+ . . . +mn2n), wherein mk=0 or 1, and k=0, 1, . . . , n.
摘要翻译： 一种可编程倍频器装置，其包括被配置为接收具有频率f的输入信号的倍频器部分，并且输出双倍信号，每个双倍信号具有频率2nxf（n = 0,1,2，...） ; 选择器部分，被配置为选择从倍频器部分输出的多个双重信号，并将多个所选择的双倍信号作为选择信号输出; 以及频率求和部分，被配置为对所选择的信号进行乘法，并输出具有频率fout = fx（m020 + m121 + ... + mk2k + ... + mn2n）的相乘信号，其中mk = 0或1，并且k = 0，1，... 。 。 ，n。
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公开(公告)号：US20080258783A1
公开(公告)日：2008-10-23
申请号：US11737384
申请日：2007-04-19
IPC分类号： H03B19/00
CPC分类号： H03B19/06
摘要： A frequency multiplier device including a plurality of multipliers, each of which has a first input port, a second input port and an output port; a first combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers, the first combiner outputting a first output signal; and a second combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers, the second combiner outputting a second output signal. The plurality of multipliers includes a first multiplier, a second multiplier, a third multiplier and a fourth multiplier, where the first multiplier has a first input port and a second input port and receives a first input signal at the first input port and the second input port; the second multiplier has a first input port and a second input port and receives a second input signal at the first input port and the second input port; the third multiplier has a first input port and a second input port and receives the second input signal at the first input port and the first input signal at the second input port; and the fourth multiplier has a first input port and a second input port and receives the first input signal at the first input port and the second input signal at the second input port.
摘要翻译： 一种倍频器装置，包括多个乘法器，每个乘法器具有第一输入端口，第二输入端口和输出端口; 耦合到所述多个乘法器的第一组合器，以便从所述多个乘法器中的至少两个乘法器接收输出信号，所述第一组合器输出第一输出信号; 以及耦合到所述多个乘法器的第二组合器，以便从所述多个乘法器中的至少两个乘法器接收输出信号，所述第二组合器输出第二输出信号。 多个乘法器包括第一乘法器，第二乘法器，第三乘法器和第四乘法器，其中第一乘法器具有第一输入端口和第二输入端口，并且在第一输入端口和第二输入端口接收第一输入信号 港口; 第二乘法器具有第一输入端口和第二输入端口，并且在第一输入端口和第二输入端口处接收第二输入信号; 第三乘法器具有第一输入端口和第二输入端口，并且在第一输入端口处接收第二输入信号和在第二输入端口接收第一输入信号; 并且第四乘法器具有第一输入端口和第二输入端口，并且在第一输入端口处接收第一输入信号，并在第二输入端口接收第二输入信号。
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公开(公告)号：US06847255B2
公开(公告)日：2005-01-25
申请号：US09872143
申请日：2001-06-01
CPC分类号： H03D3/007
摘要： A frequency discriminators (FD) and frequency modulation (FM) demodulators, utilizing single sideband (SSB) complex conversion directly to zero IF, suitable for direct demodulation at high frequencies of analog FM or digital FSK modulated signals, as well as for high speed frequency discrimination (or frequency comparison) in applications such as frequency acquisition in frequency synthesizers. The complex SSB down-converter consists of a quad of mixers and quadrature splitters in both the signal path and local oscillator (LO) path. Each mixer receives both the signal and the LO, each either in-phase or quadrature. The outputs of mixers are combined in pairs, to produce the SSB in-phase (I) baseband signal and the SSB quadrature (Q) baseband signal. Both I and Q signals are then delayed, each multiplied by un-delayed version of the other one. The multiplication products are summed together, to produce an FD error signal, or an FM demodulated signal at the output. The delay time can be dynamically controlled, in order to set the FD frequency range or to adjust the gain of the FM demodulator.
摘要翻译： 频率鉴别器（FD）和调频（FM）解调器，利用单边带（SSB）复合直接转换为零中频，适用于高频模拟FM或数字FSK调制信号的直接解调，以及高速频率 在频率合成器中频率采集等应用中的辨别（或频率比较）。 复合SSB下变频器由信号路径和本地振荡器（LO）路径中的四通道混频器和正交分路器组成。 每个混合器接收信号和LO，每个信号和相位均为同相或正交。 混频器的输出成对组合，产生SSB同相（I）基带信号和SSB正交（Q）基带信号。 I和Q信号随后被延迟，每一个乘以另一个不延迟的版本。 将乘积相加在一起，以产生FD误差信号或输出端的FM解调信号。 可以动态地控制延迟时间，以便设置FD频率范围或调整FM解调器的增益。
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公开(公告)号：US20090061810A1
公开(公告)日：2009-03-05
申请号：US11850374
申请日：2007-09-05
摘要： A frequency multiplier device comprises a first signal combiner having a first port for receiving a first input signal having a first frequency f1 and a second port for receiving a second input signal having a second frequency f2, the first signal combiner configured to provide an output signal having either a sum of the first frequency and second frequency or a difference of the first frequency and second frequency; and a frequency divider having a dividing ratio N, the frequency divider configured to output a divided signal, wherein the output signal from the first signal combiner is coupled to the frequency divider, the divided signal from the frequency divider is coupled to the second port of the first signal combiner, and the output signal from the first signal combiner has a frequency of (N/(N±1))×f1.
摘要翻译： 倍频器装置包括第一信号组合器，其具有用于接收具有第一频率f1的第一输入信号的第一端口和用于接收具有第二频率f2的第二输入信号的第二端口，所述第一信号组合器被配置为提供输出信号 具有第一频率和第二频率的和或第一频率和第二频率的差值; 以及具有分频比N的分频器，分频器被配置为输出分频信号，其中来自第一信号组合器的输出信号耦合到分频器，来自分频器的分频信号耦合到第二端口 第一信号组合器和来自第一信号组合器的输出信号具有（N /（N±1））×f1的频率。
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5.发明授权Narrow band-pass tuned resonator filter topologies having high selectivity, low insertion loss and improved out-of-band rejection over extended frequency ranges 有权具有高选择性，低插入损耗和扩展频率范围内改进的带外抑制的窄带通调谐谐振器滤波器拓扑公开(公告)号：US07078987B1
公开(公告)日：2006-07-18
申请号：US09408826
申请日：1999-09-29
IPC分类号： H03H7/09
CPC分类号： H03H7/09 , H01P1/203 , H03H7/0123 , H03H7/1775
摘要： A tuned resonator circuit topology is disclosed that permits implementation of narrow band-pass filters having high loaded Q and optimal coupling (for low insertion loss) using a parallel tuned resonator topology at frequencies in the 1 to 2 GHz range and beyond. The topology consists of a mirror image of the parallel tuned circuit about the signal line of a conventional parallel tuned circuit to effect a cancellation of virtually all of the induced currents between the inductive elements of the resonators. This reduction in induced currents reduces the magnetic coupling between the resonators, thereby offsetting the increase in overall coupling between the resonators as frequency increases, and thereby serves to maintain optimal coupling between the resonators as the frequency of operation increases. Moreover, the mirror image topology increases the parallelism between the inductive elements in the resonators, thereby decreasing the inductance values and permitting an increase in capacitance values. Increasing the capacitance values of the resonators effectively offsets the decrease in the loaded Q as frequency is increased. The topology works for any number of parallel resonators. As the resolution of the manufacturing process decreases (e.g. from printed circuit board to integrated circuit processes), the range of operating frequencies scales with the increase in resolution.
摘要翻译： 公开了一种调谐谐振器电路拓扑，其允许使用在1至2GHz范围内和以外的频率的并行调谐谐振器拓扑来实现具有高负载Q和最佳耦合（用于低插入损耗）的窄带通滤波器。 该拓扑结构包括关于常规并联调谐电路的信号线的并联调谐电路的镜像，以实现谐振器的感应元件之间几乎所有感应电流的消除。 感应电流的这种减小减小了谐振器之间的磁耦合，从而随着频率增加而抵消了谐振器之间的总体耦合的增加，从而用于在操作频率增加时保持谐振器之间的最佳耦合。 此外，镜像拓扑结构增加了谐振器中的电感元件之间的并联性，从而减小了电感值并允许电容值的增加。 增加谐振器的电容值有效地抵消随着频率增加而加载的Q的减小。 该拓扑适用于任意数量的并联谐振器。 随着制造工艺的分辨率降低（例如从印刷电路板到集成电路处理），工作频率的范围随着分辨率的增加而增加。
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公开(公告)号：US08275817B2
公开(公告)日：2012-09-25
申请号：US11737384
申请日：2007-04-19
IPC分类号： G06F7/00
CPC分类号： H03B19/06
摘要： A frequency multiplier device including a plurality of multipliers, each of which has a first input port, a second input port and an output port; a first combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers, the first combiner outputting a first output signal; and a second combiner coupled to the plurality of multipliers so as to receive an output signal from at least two of the plurality of multipliers, the second combiner outputting a second output signal. The plurality of multipliers includes a first multiplier, a second multiplier, a third multiplier and a fourth multiplier, where the first multiplier has a first input port and a second input port and receives a first input signal at the first input port and the second input port; the second multiplier has a first input port and a second input port and receives a second input signal at the first input port and the second input port; the third multiplier has a first input port and a second input port and receives the second input signal at the first input port and the first input signal at the second input port; and the fourth multiplier has a first input port and a second input port and receives the first input signal at the first input port and the second input signal at the second input port.
摘要翻译： 一种倍频器装置，包括多个乘法器，每个乘法器具有第一输入端口，第二输入端口和输出端口; 耦合到所述多个乘法器的第一组合器，以便从所述多个乘法器中的至少两个乘法器接收输出信号，所述第一组合器输出第一输出信号; 以及耦合到所述多个乘法器的第二组合器，以便从所述多个乘法器中的至少两个乘法器接收输出信号，所述第二组合器输出第二输出信号。 多个乘法器包括第一乘法器，第二乘法器，第三乘法器和第四乘法器，其中第一乘法器具有第一输入端口和第二输入端口，并且在第一输入端口和第二输入端口接收第一输入信号 港口; 第二乘法器具有第一输入端口和第二输入端口，并且在第一输入端口和第二输入端口处接收第二输入信号; 第三乘法器具有第一输入端口和第二输入端口，并且在第一输入端口处接收第二输入信号和在第二输入端口接收第一输入信号; 并且第四乘法器具有第一输入端口和第二输入端口，并且在第一输入端口处接收第一输入信号，并在第二输入端口接收第二输入信号。
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7.发明授权Injection locked oscillator automatic frequency centering method and apparatus 有权注射锁定振荡器自动频率定心方法和装置公开(公告)号：US06580330B1
公开(公告)日：2003-06-17
申请号：US09665559
申请日：2000-09-19
IPC分类号： H03L724
CPC分类号： H03L7/24
摘要： An apparatus for centering the frequency of an injection locked oscillator (ILO) measures the difference of the phase (or a parameter related to the phase) between ILO output signals in response to alternate high level and low level RF drive signals, and can tune the center frequency of the ILO in accordance with the measurements to minimize the phase difference.
摘要翻译： 用于使喷射锁定振荡器（ILO）的频率居中的装置测量在输出信号之间的相位（或与相位相关的参数）的差异，以响应交替的高电平和低电平RF驱动信号，并且可调谐 国际劳工组织根据测量的中心频率使相位差最小化。
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8.发明授权Elimination of phase noise and drift incident to up and down conversion in a broadcast communication system 失效消除在广播通信系统中上下转换引起的相位噪声和漂移
公开(公告)号：US5109532A
公开(公告)日：1992-04-28
申请号：US472597
申请日：1990-01-30
IPC分类号： H03D3/24
CPC分类号： H03D3/242
摘要： Phase noise and drift in a broadcast communication system caused by imperfections in transmitter and receiver local oscillators used for up and down conversion of a frequency or phase modulated information signal is eliminated from a downconverted component that is provided for demodulation by adding a pilot frequency component to the modulated signal for mixing by the local oscillator in the transmitter and by frequency locking the local oscillator in the receiver, so that a signal at a frequency equal to the sum of the intermediate frequency and the pilot frequency provided by a phase-locked loop that tracks the pilot frequency component of the downconverted signal is maintained at a desired value. The downconverted signal is mixed with the sum signal provided by the phase-locked loop to provide a component for demodulation at the difference between the pilot frequency and the modulation frequency that is free from the phase noise and drift caused by the local oscillators. Since the phase noise and drift caused by the local oscillators affects the phases of the modulation frequency information component and the pilot frequency component equally, the frequency modulated information is proportional to the difference between the pilot signal frequency and the modulation frequency, and the effect of phase noise and drift is eliminated.
摘要翻译： 由用于频率或相位调制信息信号的上下转换的发射机和接收机本地振荡器中的缺陷引起的广播通信系统中的相位噪声和漂移从用于解调的下变频分量中消除，所述下变频分量通过将导频分量加到 用于由发射机中的本地振荡器进行混频的调制信号，以及通过频率锁定接收机中的本地振荡器，使得频率等于由锁相环提供的中频和导频之和的频率的信号， 跟踪下变频信号的导频频率分量保持在期望值。 下变频信号与由锁相环提供的和信号混合，以在导频和调制频率之间的差异处提供用于解调的分量，该分频与本地振荡器引起的相位噪声和漂移无关。 由于由本地振荡器引起的相位噪声和漂移影响调制频率信息分量和导频频率分量的相位，调频信号与导频信号频率和调制频率之间的差异成正比， 消除了相位噪声和漂移。
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公开(公告)号：US08369820B2
公开(公告)日：2013-02-05
申请号：US11850374
申请日：2007-09-05
IPC分类号： H04B1/16
摘要： A frequency multiplier device comprises a first signal combiner having a first port for receiving a first input signal having a first frequency f1 and a second port for receiving a second input signal having a second frequency f2, the first signal combiner configured to provide an output signal having either a sum of the first frequency and second frequency or a difference of the first frequency and second frequency; and a frequency divider having a dividing ratio N, the frequency divider configured to output a divided signal, wherein the output signal from the first signal combiner is coupled to the frequency divider, the divided signal from the frequency divider is coupled to the second port of the first signal combiner, and the output signal from the first signal combiner has a frequency of (N/(N±1))×f1.
摘要翻译： 倍频器装置包括第一信号组合器，其具有用于接收具有第一频率f1的第一输入信号的第一端口和用于接收具有第二频率f2的第二输入信号的第二端口，所述第一信号组合器被配置为提供输出信号 具有第一频率和第二频率的和或第一频率和第二频率的差值; 以及具有分频比N的分频器，分频器被配置为输出分频信号，其中来自第一信号组合器的输出信号耦合到分频器，来自分频器的分频信号耦合到第二端口 第一信号组合器和来自第一信号组合器的输出信号具有（N /（N±1））×f1的频率。
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公开(公告)号：US20090033378A1
公开(公告)日：2009-02-05
申请号：US11830445
申请日：2007-07-30
IPC分类号： H03B19/00
CPC分类号： H03D7/00
摘要： A programmable frequency multiplier device which includes a frequency doubler section configured to receive an input signal having a frequency f, and to output doubled signals, each of the doubled signals having a frequency 2n×f (n=0, 1, 2, . . . ); a selector section configured to select a plurality of the doubled signals output from the frequency doubler section, and to output the plurality of the selected doubled signals as selected signals; and a frequency summation section configured to multiply the selected signals, and to output a multiplied signal having a frequency fout=f×(m020+m121+ . . . +mk2k+ . . . +mn2n), wherein mk=0 or 1, and k=0, 1, . . . , n.
摘要翻译： 一种可编程倍频器装置，其包括被配置为接收具有频率f的输入信号的倍频器部分，并且输出双倍信号，每个双倍信号具有频率2nxf（n = 0,1,2，...） ; 选择器部分，被配置为选择从倍频器部分输出的多个双重信号，并将多个所选择的双倍信号作为选择信号输出; 以及频率求和部分，被配置为对所选择的信号进行乘法，并输出具有频率fout = fx（m020 + m121 + ... + mk2k + ... + mn2n）的相乘信号，其中mk = 0或1，并且k = 0，1，... 。 。 ，n。
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