METHODS OF FORMING DUAL GATE OF SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHODS OF FORMING DUAL GATE OF SEMICONDUCTOR DEVICE 审中-公开
    形成半导体器件双栅的方法

    公开(公告)号:US20070148848A1

    公开(公告)日:2007-06-28

    申请号:US11614975

    申请日:2006-12-22

    CPC classification number: H01L21/823842

    Abstract: Disclosed herein is a method for forming a dual gate of a semiconductor device. The method comprises the steps of forming a first polysilicon layer doped with p-type impurity ions and a second polysilicon layer doped with n-type impurity ions on a first region and a second region of a semiconductor substrate, respectively, and sequentially subjecting the surfaces of the first and second polysilicon layers to first wet cleaning, second wet cleaning and dry cleaning.

    Abstract translation: 本文公开了一种用于形成半导体器件的双栅极的方法。 该方法包括以下步骤:分别在半导体衬底的第一区域和第二区域上形成掺杂有p型杂质离子的第一多晶硅层和掺杂n型杂质离子的第二多晶硅层, 的第一和第二多晶硅层进行第一次湿式清洗,第二次湿式清洗和干洗。

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