公开(公告)号：US6019663A

公开(公告)日：2000-02-01

申请号：US27018

申请日：1998-02-20

申请人： Larry D. Angell ,  Andrew J. Krivy

发明人： Larry D. Angell ,  Andrew J. Krivy

IPC分类号： B24B19/16 ,  B24B19/22 ,  B24B37/34 ,  G01R3/00 ,  B24B49/00

CPC分类号： B24B37/345 ,  B24B19/16 ,  B24B19/22 ,  G01R3/00

摘要： A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned. Thereafter, the z-axis distance between the probe pins and the surface of the cleaning wafer is decreased such that the probe pins contact the cleaning wafer, thereby removing debris from the probe pins. The cleaning wafer is then removed from the support device when cleaning of the probe pins has been completed.

摘要翻译： 一种用于清洁在其制造期间用于测试半导体器件的探针卡上的探针的系统和方法。 陶瓷清洁晶片用于清洁探针，而无需从生产线上移除探针卡。 用于测试生产晶片的相同装置在探针清洁循环期间也处理清洁晶片。 在清洁周期的操作期间，清洁晶片被放置在手动装载盘中，其将清洁晶片插入探测机。 清洁晶片由机器人手推车运送到清洁晶片对准和居中的预对准阶段区域。 然后将清洁晶片放置在支撑装置上。 支撑装置和清洁晶片位于气动传感器下方并成型以确定晶片平面度。 然后将支撑装置和清洁晶片定位在待清洁的探针卡上的探针的下方。 此后，探针和清洁晶片的表面之间的z轴距离减小，使得探针与接触清洁晶片相接触，从而去除探针的碎屑。 然后当完成探针的清洁时，将清洁晶片从支撑装置中取出。

公开(公告)号：US07250780B2

公开(公告)日：2007-07-31

申请号：US10742729

申请日：2003-12-19

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1/073 ,  G01R31/28

CPC分类号： G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电气通信的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06623345B2

公开(公告)日：2003-09-23

申请号：US09901941

申请日：2001-07-09

申请人： Larry D. Angell ,  Andrew J. Krivy

发明人： Larry D. Angell ,  Andrew J. Krivy

IPC分类号： B24D1100

CPC分类号： B24B37/345 ,  B24B19/16 ,  B24B19/22 ,  G01R3/00

摘要： A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned. Thereafter, the z-axis distance between the probe pins and the surface of the cleaning wafer is decreased such that the probe pins contact the cleaning wafer, thereby removing debris from the probe pins. The cleaning wafer is then removed from the support device when cleaning of the probe pins has been completed.

公开(公告)号：US6060891A

公开(公告)日：2000-05-09

申请号：US797719

申请日：1997-02-11

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1/073 ,  G01R31/28

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06798224B1

公开(公告)日：2004-09-28

申请号：US10072734

申请日：2002-02-05

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06419844B1

公开(公告)日：2002-07-16

申请号：US09469339

申请日：1999-12-20

申请人： Andrew J. Krivy ,  Warren M. Farnworth ,  David R. Hembree ,  Salman Akram ,  James M. Wark ,  John O. Jacobson

发明人： Andrew J. Krivy ,  Warren M. Farnworth ,  David R. Hembree ,  Salman Akram ,  James M. Wark ,  John O. Jacobson

IPC分类号： H01L2100

CPC分类号： G01R35/005 ,  G01R1/073 ,  Y10T29/49197

摘要： A calibration target for calibrating semiconductor wafer test systems including probe testers and probe card analyzers is provided. Also provided are calibration methods using the calibration target, and a method for fabricating the calibration target. The calibration target includes a substrate with various three dimensional alignment features formed thereon. A first type of alignment feature includes a contrast layer and an alignment fiducial formed on a tip portion thereof. The contrast layer and alignment fiducial are configured for viewing by a viewing device of the probe card analyzer, or the test system, to achieve X-direction and Y-direction calibration. A second type of alignment feature includes a conductive layer formed on a tip portion thereof, which is configured to electrically engage a contact on a check plate of the probe card analyzer, or a probe contact on a probe card of the test system, to achieve Z-direction calibration. The alignment features can be formed by forming raised members on a silicon substrate, and depositing and etching metal layers on the raised members.

摘要翻译： 提供了用于校准包括探针测试仪和探针卡分析仪在内的半导体晶片测试系统的校准目标。 还提供了使用校准目标的校准方法以及用于制造校准目标的方法。 校准目标包括其上形成有各种三维对准特征的基板。 第一类型的对准特征包括形成在其顶端部分上的对比层和对准基准。 对比层和对准基准被配置为通过探针卡分析仪或测试系统的观察装置进行观察，以实现X方向和Y方向校准。 第二类型的对准特征包括形成在其尖端部分上的导电层，其被配置为与探针卡分析器的支撑板上的触点或测试系统的探针卡上的探针接触电接合，以实现 Z向校准。 对准特征可以通过在硅衬底上形成凸起构件，以及在凸起构件上沉积和蚀刻金属层来形成。

公开(公告)号：US06359456B1

公开(公告)日：2002-03-19

申请号：US09929388

申请日：2001-08-14

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06257958B1

公开(公告)日：2001-07-10

申请号：US09495142

申请日：2000-01-31

申请人： Larry D. Angell ,  Andrew J. Krivy

发明人： Larry D. Angell ,  Andrew J. Krivy

IPC分类号： B24B4900

CPC分类号： B24B37/345 ,  B24B19/16 ,  B24B19/22 ,  G01R3/00

摘要： A system and method for cleaning probe pins on a probe card used in testing a semiconductor device during fabrication thereof. A ceramic cleaning wafer is utilized to clean the probe pins without having to remove the probe card from a production line. The same apparatus used to test production wafers also handles the cleaning wafer during a probe cleaning cycle. During operation of the cleaning cycle, the cleaning wafer is placed in a manual load tray, which inserts the cleaning wafer into a prober machine. The cleaning wafer is transported by a robotic trolley to a prealign stage area where the cleaning wafer is aligned and centered. The cleaning wafer is then placed on a support device. The support device and cleaning wafer are positioned under a pneumatic sensor and profiled to determine wafer planarity. The support device and cleaning wafer are then positioned underneath the probe pins on the probe card to be cleaned. Thereafter, the z-axis distance between the probe pins and the surface of the cleaning wafer is decreased such that the probe pins contact the cleaning wafer, thereby removing debris from the probe pins. The cleaning wafer is their removed from the support device when cleaning of the probe pins has been completed.

摘要翻译： 一种用于清洁在其制造期间用于测试半导体器件的探针卡上的探针的系统和方法。 陶瓷清洁晶片用于清洁探针，而无需从生产线上移除探针卡。 用于测试生产晶片的相同装置在探针清洁循环期间也处理清洁晶片。 在清洁周期的操作期间，清洁晶片被放置在手动装载盘中，其将清洁晶片插入探测机。 清洁晶片由机器人手推车运送到清洁晶片对准和居中的预对准阶段区域。 然后将清洁晶片放置在支撑装置上。 支撑装置和清洁晶片位于气动传感器下方并成型以确定晶片平面度。 然后将支撑装置和清洁晶片定位在待清洁的探针卡上的探针的下方。 此后，探针和清洁晶片的表面之间的z轴距离减小，使得探针与接触清洁晶片相接触，从而去除探针的碎屑。 当清洁探针时，清洁晶片从支撑装置上移除。

公开(公告)号：US06420892B1

公开(公告)日：2002-07-16

申请号：US09685132

申请日：2000-10-10

申请人： Andrew J. Krivy ,  Warren M. Farnworth ,  David R. Hembree ,  Salman Akram ,  James M. Wark ,  John O. Jacobson

发明人： Andrew J. Krivy ,  Warren M. Farnworth ,  David R. Hembree ,  Salman Akram ,  James M. Wark ,  John O. Jacobson

IPC分类号： G01R3102

CPC分类号： G01R35/005 ,  G01R1/073 ,  Y10T29/49197

摘要： A calibration target for calibrating semiconductor wafer test systems including probe testers and probe card analyzers is provided. Also provided are calibration methods using the calibration target, and a method for fabricating the calibration target. The calibration target includes a substrate with various three dimensional alignment features formed thereon. A first type of alignment feature includes a contrast layer and an alignment fiducial formed on a tip portion thereof. The contrast layer and alignment fiducial are configured for viewing by a viewing device of the probe card analyzer, or the test system, to achieve X-direction and Y-direction calibration. A second type of alignment feature includes a conductive layer formed on a tip portion thereof, which is configured to electrically engage a contact on a check plate of the probe card analyzer, or a probe contact on a probe card of the test system, to achieve Z-direction calibration. The alignment features can be formed by forming raised members on a silicon substrate, and depositing and etching metal layers on the raised members.

摘要翻译： 提供了用于校准包括探针测试仪和探针卡分析仪在内的半导体晶片测试系统的校准目标。 还提供了使用校准目标的校准方法以及用于制造校准目标的方法。 校准目标包括其上形成有各种三维对准特征的基板。 第一类型的对准特征包括形成在其顶端部分上的对比层和对准基准。 对比层和对准基准被配置为通过探针卡分析仪或测试系统的观察装置进行观察，以实现X方向和Y方向校准。 第二类型的对准特征包括形成在其尖端部分上的导电层，其被配置为与探针卡分析器的支撑板上的触点或测试系统的探针卡上的探针接触电接合，以实现 Z方向校准。 对准特征可以通过在硅衬底上形成凸起构件，以及在凸起构件上沉积和蚀刻金属层来形成。

公开(公告)号：US06275052B1

公开(公告)日：2001-08-14

申请号：US09303367

申请日：1999-04-30

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。