Apparatus for generating high dynamic range, high voltage source using low voltage transistors
    1.
    发明授权
    Apparatus for generating high dynamic range, high voltage source using low voltage transistors 有权
    用于使用低压晶体管产生高动态范围,高电压源的装置

    公开(公告)号:US09304527B1

    公开(公告)日:2016-04-05

    申请号:US13798361

    申请日:2013-03-13

    CPC classification number: G05F3/02 G05F3/24 G05F3/262

    Abstract: The present disclosure provides a varying high voltage source implemented with low voltage domain electronic components that are less costly to manufacture. According to one aspect, the present disclosure provides a high voltage circuit apparatus comprising a pull up resistance module, a plurality of cascode cell stages, a first of the cascode cell stages being coupled to the pull up resistance module, a low voltage domain current sink module coupled to a last of the cascode cell stages, and a clamping voltage source coupled to the last of the cascode cell stages. The circuit apparatus is devoid of high-voltage transistor components.

    Abstract translation: 本公开提供了一种用低电压域电子元件实现的变化的高电压源,其制造成本较低。 根据一个方面,本公开提供了一种高压电路装置,包括上拉电阻模块,多个共源共栅电池级,第一级联单体级耦合到上拉电阻模块,低电压域电流吸收器 耦合到最后一个级联单元级的模块以及耦合到最后一个级联单元级的钳位电压源。 电路装置没有高压晶体管元件。

    Output driver with common mode feedback
    2.
    发明申请
    Output driver with common mode feedback 有权
    具有共模反馈的输出驱动器

    公开(公告)号:US20070075776A1

    公开(公告)日:2007-04-05

    申请号:US11239944

    申请日:2005-09-30

    CPC classification number: H03F3/45188 H03F3/3061 H03F3/45654 H03F3/45708

    Abstract: A complementary metal-oxide semiconductor output driver provides a differential output signal having a particular differential voltage swing and a particular common mode voltage to a differential output node for various types of load circuits coupled to the differential output node. The load circuit may have any impedance within a particular impedance range. A current source provides a current with a variable current component that adjusts the differential voltage swing of the differential output signal. A common mode feedback circuit adjusts the common mode voltage of the differential output signal by sourcing current to the differential output node or sinking current from the differential output node. At least a portion of a current flowing into a load circuit coupled to the differential node is provided by the current source, thereby reusing current from the current source.

    Abstract translation: 互补金属氧化物半导体输出驱动器为耦合到差分输出节点的各种类型的负载电路提供具有特定差分电压摆幅和特定共模电压的差分输出信号到差分输出节点。 负载电路可以在特定阻抗范围内具有任何阻抗。 电流源为电流提供调节差分输出信号的差分电压摆幅的可变电流分量。 共模反馈电路通过向差分输出节点提供电流或从差分输出节点吸收电流来调整差分输出信号的共模电压。 流过耦合到差分节点的负载电路的电流的至少一部分由电流源提供,从而重新使用来自电流源的电流。

    USB transceiver circuitry including 5 volt tolerance protection
    3.
    发明授权
    USB transceiver circuitry including 5 volt tolerance protection 有权
    USB收发电路包括5伏容限保护

    公开(公告)号:US08166222B2

    公开(公告)日:2012-04-24

    申请号:US12059998

    申请日:2008-03-31

    CPC classification number: G06F13/4072

    Abstract: An integrated circuit includes USB communication circuitry for communicating via a USB interface. The USB transceiver circuitry transmits data to and from the integrated circuit over the USB interface. The USB transceiver circuitry further provides protection to internal circuitry of the integrated circuit from a 5 volt short circuit on the USB interface.

    Abstract translation: 集成电路包括用于通过USB接口进行通信的USB通信电路。 USB收发器电路通过USB接口将数据传输到集成电路和从集成电路传输数据。 USB收发器电路进一步为USB接口上的5伏短路提供对集成电路内部电路的保护。

    Multiple signal format output buffer
    4.
    发明申请
    Multiple signal format output buffer 有权
    多信号格式输出缓冲区

    公开(公告)号:US20050285629A1

    公开(公告)日:2005-12-29

    申请号:US10878197

    申请日:2004-06-28

    CPC classification number: H03K19/018585

    Abstract: An output buffer circuit drives multiple signal formats. The output buffer circuit reduces duplication of output bond pads on an integrated circuit die. The output buffer circuit reduces a need for including conversion buffers on system boards. A single integrated circuit including the output buffer circuit may meet a variety of applications. The output buffer achieves these results with a programmable output voltage swing and a programmable output common mode voltage. In some embodiments of the present invention, an integrated circuit includes at least one single-ended buffer and at least one differential circuit coupled to a pair of outputs. One of the single-ended buffer and the differential circuit is selectively enabled to provide a signal to the outputs.

    Abstract translation: 输出缓冲电路驱动多种信号格式。 输出缓冲电路减少了集成电路管芯上的输出接合焊盘的重复。 输出缓冲电路减少了在系统板上包含转换缓冲区的需求。 包括输出缓冲电路的单个集成电路可以满足各种应用。 输出缓冲器通过可编程输出电压摆幅和可编程输出共模电压实现这些结果。 在本发明的一些实施例中,集成电路包括耦合到一对输出的至少一个单端缓冲器和至少一个差分电路。 单端缓冲器和差分电路之一被选择性地使能以向输出提供信号。

    Voltage reference generator circuit using low-beta effect of a CMOS bipolar transistor
    5.
    发明申请
    Voltage reference generator circuit using low-beta effect of a CMOS bipolar transistor 有权
    使用CMOS双极晶体管的低β效应的参考电压源电路

    公开(公告)号:US20050218879A1

    公开(公告)日:2005-10-06

    申请号:US10813837

    申请日:2004-03-31

    CPC classification number: G05F3/30 G05F3/267

    Abstract: A voltage reference generator has been discovered that generates a stable reference voltage that is less than the bandgap voltage of silicon for power supply voltages less than 2V, yet provides sufficient voltage headroom to operate a cascaded current mirror. In one embodiment, the voltage reference generator has a power supply rejection ratio of at least 60 dB and has improved noise performance as compared to traditional bandgap circuits. These advantages are achieved by leveraging the low-beta effect of a CMOS bipolar transistor to generate a current proportional to an absolute temperature.

    Abstract translation: 已经发现了一种电压参考发生器,其产生小于2V的电源电压的硅的带隙电压的稳定参考电压,但是为级联电流镜提供足够的电压余量。 在一个实施例中,与传统的带隙电路相比,电压参考发生器具有至少60dB的电源抑制比并且具有改善的噪声性能。 这些优点通过利用CMOS双极晶体管的低β效应产生与绝对温度成比例的电流来实现。

    USB TRANSCEIVER CIRCUITRY INCLUDING 5 VOLT TOLERANCE PROTECTION
    6.
    发明申请
    USB TRANSCEIVER CIRCUITRY INCLUDING 5 VOLT TOLERANCE PROTECTION 有权
    USB收发器电路,包括5伏耐受保护

    公开(公告)号:US20090248930A1

    公开(公告)日:2009-10-01

    申请号:US12059998

    申请日:2008-03-31

    CPC classification number: G06F13/4072

    Abstract: An integrated circuit includes USB communication circuitry for communicating via a USB interface. The USB transceiver circuitry transmits data to and from the integrated circuit over the USB interface. The USB transceiver circuitry further provides protection to internal circuitry of the integrated circuit from a 5 volt short circuit on the USB interface.

    Abstract translation: 集成电路包括用于通过USB接口进行通信的USB通信电路。 USB收发器电路通过USB接口将数据传输到集成电路和从集成电路传输数据。 USB收发器电路进一步为USB接口上的5伏短路提供对集成电路内部电路的保护。

    HIGH-SPEED DIVIDER WITH PULSE-WIDTH CONTROL
    7.
    发明申请
    HIGH-SPEED DIVIDER WITH PULSE-WIDTH CONTROL 有权
    具有脉冲宽度控制的高速分路器

    公开(公告)号:US20070139088A1

    公开(公告)日:2007-06-21

    申请号:US11680026

    申请日:2007-02-28

    Abstract: In at least one embodiment of the invention, a method for dividing a first signal having a first frequency by a divide ratio to generate a lower frequency signal includes generating a first plurality of signals having a common frequency, a first pulse width, and different phases. The first plurality of signals is based, at least in part, on at least one signal having a second pulse width. The first pulse width is selected from a plurality of pulse widths based, at least in part, on the divide ratio. The method includes sequentially selecting individual pulses of the first plurality of signals as an output signal of a select circuit to generate an output signal having a frequency lower than the first frequency.

    Abstract translation: 在本发明的至少一个实施例中,一种用于将具有第一频率的第一信号除以分频比以产生较低频率信号的方法包括产生具有共同频率,第一脉冲宽度和不同相位的第一多个信号 。 第一组多个信号至少部分地基于具有第二脉冲宽度的至少一个信号。 至少部分地基于分频比,从多个脉冲宽度中选择第一脉冲宽度。 该方法包括顺序选择第一多个信号中的各个脉冲作为选择电路的输出信号,以产生具有低于第一频率的频率的输出信号。

    Voltage reference generator circuit subtracting CTAT current from PTAT current
    8.
    发明申请
    Voltage reference generator circuit subtracting CTAT current from PTAT current 有权
    电压基准发生器电路从PTAT电流中减去CTAT电流

    公开(公告)号:US20050285666A1

    公开(公告)日:2005-12-29

    申请号:US10877288

    申请日:2004-06-25

    CPC classification number: G05F3/267

    Abstract: A voltage reference generator generates a stable reference voltage that is less than the bandgap voltage of silicon for power supply voltages less than 2V, yet provides sufficient voltage headroom to operate a current mirror. In one embodiment, the voltage reference generator has a power supply rejection ratio of at least 60 dB and has comparable noise performance as compared to traditional bandgap cirucits. These advantages are achieved by subtracting a current proportional to a complement of an absolute temperature from a current proportional to the absolute temperature to generate a voltage having a positive temperature coefficient, which is then added to a voltage that is a complement of the absolute temperature to achieve a voltage that has a low temperature coefficient.

    Abstract translation: 电压参考发生器产生小于2V的电源电压的硅的带隙电压的稳定的参考电压,但是为电流镜提供足够的电压余量。 在一个实施例中,电压参考发生器具有至少60dB的电源抑制比,并且与传统的带隙尖端相比具有可比较的噪声性能。 这些优点通过从与绝对温度成比例的电流中减去与绝对温度的互补成比例的电流来实现,以产生具有正温度系数的电压,然后将其加到作为绝对温度至 达到低温系数的电压。

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