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    Apparatus for charging and discharging battery cell
    2.
    发明授权
    Apparatus for charging and discharging battery cell 有权

    公开(公告)号：US12126200B2

    公开(公告)日：2024-10-22

    申请号：US18405055

    申请日：2024-01-05

    申请人： SK On Co., Ltd.

    发明人： Chang Mook Hwang ,  Gyeong Min Ryu ,  Hyun Ji Kim ,  Ha Neul Song

    IPC分类号： H01M10/46 ,  H02J7/00 ,  H05K7/20

    CPC分类号： H02J7/0044 ,  H02J7/0013 ,  H02J7/0047 ,  H05K7/20909

    摘要： The present disclosure relates to an apparatus for charging and discharging, comprising: a case; a first chamber and a second chamber positioned in the case along width direction of the case and configured to accommodate a first battery cell and a second battery cell respectively; a module chamber positioned inside the case and outside the first chamber and the second chamber; a charging/discharging module portion positioned in the module chamber and charging and discharging the first battery cell and the second battery cell; a module hole formed through one face of the case to communicate the module chamber with the outside of the case; and an air treatment portion provided inside the case to supply air to the module chamber at a temperature lower than an external temperature, which is a temperature outside the case.

    Flexible circuit board, touch display module and touch display apparatus
    3.
    发明授权
    Flexible circuit board, touch display module and touch display apparatus 有权

    公开(公告)号：US12126102B2

    公开(公告)日：2024-10-22

    申请号：US17607009

    申请日：2020-12-26

    申请人： CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

    发明人： Peng Zhou

    IPC分类号： H01R12/61 ,  G06F3/041 ,  H10K59/40 ,  H10K77/10 ,  G06F3/044

    CPC分类号： H01R12/61 ,  G06F3/0412 ,  H10K59/40 ,  H10K77/111 ,  G06F3/0446

    摘要： A flexible circuit board includes a first substrate, display panel signal traces, a touch chip, at least one second substrate, a touch auxiliary device, first touch signal traces and at least one second touch signal trace. The display panel signal traces, the touch chip and the at least one second substrate are located on the same side of the first substrate; and the touch auxiliary device is located on a second substrate. The first touch signal trace includes a first connection trace and a first transfer trace that are electrically connected to each other. The second touch signal trace includes a second connection trace and a second transfer trace that are electrically connected to each other. The first connection trace and the second connection trace are disposed on the first substrate, and the first transfer trace and the second transfer trace are disposed on the at least one second substrate.

    Memory system and operating method of memory system
    4.
    发明授权
    Memory system and operating method of memory system 有权

    公开(公告)号：US12124718B2

    公开(公告)日：2024-10-22

    申请号：US17470531

    申请日：2021-09-09

    申请人： SK hynix Inc.

    发明人： Heung Tae Jin

    IPC分类号： G06F3/06

    CPC分类号： G06F3/0635 ,  G06F3/0619 ,  G06F3/0659 ,  G06F3/0673

    摘要： Embodiments of the present disclosure relate to a memory system and an operating method of the memory system. According to embodiments of the present disclosure, a memory system may store, for each of the plurality of memory dies, a program fail count indicating a cumulative number of occurrences of a program fail during a program operation for each memory die, and may change, for a target memory die among the plurality of memory dies, a first operation parameter among operation parameters applied to the target memory die when executing a program operation on the target memory die, based on a target program fail count which is the program fail count for the target memory die.

    Data bus inversion circuit and semiconductor apparatus including the same
    5.
    发明授权
    Data bus inversion circuit and semiconductor apparatus including the same 有权

    公开(公告)号：US12124397B2

    公开(公告)日：2024-10-22

    申请号：US18173791

    申请日：2023-02-24

    申请人： SK hynix Inc.

    发明人： Hong Ki Moon ,  Seok Bo Shim

    IPC分类号： G06F13/42

    CPC分类号： G06F13/4221

    摘要： The present technology may include a first latch circuit configured to store, as first data, data that is transmitted through a first signal line, a second latch circuit configured to store, as a plurality of second data, the data that is transmitted through the first signal line by sorting the data by a plurality of second signal lines that are connected to the first signal line in common, and a data bus inversion engine configured to selectively perform a first mode in which the data bus inversion engine generates a data bus inversion flag by comparing the first data with current input data and a second mode in which the data bus inversion engine generates the data bus inversion flag by comparing the plurality of second data with the current input data.