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公开(公告)号：US09569991B2
公开(公告)日：2017-02-14
申请号：US14276392
申请日：2014-05-13
Applicant: Yuichi Maekawa , Koichi Miwa
Inventor： Yuichi Maekawa , Koichi Miwa
CPC classification number: G09G3/006 , G09G3/3233 , G09G2300/0842 , G09G2310/0251
Abstract: Checking failures in transistors including driving transistors, switching transistors, and sampling transistors before light emitting elements are formed in a display device. I-V characteristics including threshold voltage of the driving transistor 10C in one pixel circuit can be detected. In a pixel circuit, the sampling transistor 10A and switching transistor 10D are made conductive and the signal potential is given to the gate electrode of the driving transistor 10C from the signal line DTCm. At this time, the current which flows between the drain electrode and source electrode of driving transistor 10C flows through the switching transistor 10D and a reference potential line Vref_r to a test point, and is measured by a current measuring device connected to the test point.
Abstract translation: 在显示装置中形成发光元件之前，检查包括驱动晶体管，开关晶体管和采样晶体管在内的晶体管的故障。 可以检测包括一个像素电路中的驱动晶体管10C的阈值电压的I-V特性。 在像素电路中，采样晶体管10A和开关晶体管10D导通，并且信号电位从信号线DTCm被提供给驱动晶体管10C的栅电极。 此时，在驱动晶体管10C的漏电极和源电极之间流动的电流通过开关晶体管10D和基准电位线Vref_r流到测试点，并且由连接到测试点的电流测量装置测量。
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公开(公告)号：US09070323B2
公开(公告)日：2015-06-30
申请号：US12426986
申请日：2009-04-21
Applicant: Ronald S. Cok
Inventor： Ronald S. Cok
CPC classification number: B32B37/24 , B32B37/12 , B32B2037/243 , B32B2307/202 , B32B2307/40 , B32B2457/20 , G09G3/3266 , G09G3/3275 , G09G2310/0218 , G09G2310/0221 , G09G2310/0278 , G09G2310/0286
Abstract: A display device includes a substrate having a display area; row electrodes formed over the substrate in the display area extending in a row direction and column electrodes formed over the substrate in the display area extending in a column direction different from the row direction, the row and column electrodes overlapping to form pixels; wherein the pixels are divided into two or more separate pixel groups, each pixel group having group row electrodes and separate group column electrodes; two or more spaced column driver chiplets located in the display area, each column driver chiplet uniquely connected to a different pixel group wherein in at least one of the column driver chiplets is located between pixel groups, and the two or more spaced column driver chiplets adapted to drive the group column electrodes of the one pixel group; and one or more row driver(s) connected to the row electrodes.
Abstract translation: 显示装置包括具有显示区域的基板; 在显示区域中形成的行电极，该列电极形成在沿行方向延伸的显示区域中的列电极和在与行方向不同的列方向延伸的显示区域中的基板上形成的列电极，行电极和列电极重叠形成像素; 其中所述像素被分成两个或更多个分离的像素组，每个像素组具有组行电极和单独的组列电极; 位于显示区域中的两个或更多个间隔开的列驱动器小芯片，每个列驱动器小灯独特地连接到不同的像素组，其中至少一个列驱动器小芯片位于像素组之间，并且两个或更多个间隔开的列驱动器小灯适应 驱动一个像素组的列列电极; 以及连接到行电极的一个或多个行驱动器。
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公开(公告)号：US09040170B2
公开(公告)日：2015-05-26
申请号：US11289023
申请日：2005-11-29
Applicant: Joseph C. Deaton , Barbara B. Lussier
Inventor： Joseph C. Deaton , Barbara B. Lussier
CPC classification number: H01L51/0085 , C07F15/0033 , C07F15/0073 , C09K11/06 , C09K2211/1044 , C09K2211/185 , H01L51/0084 , H01L51/5004 , H01L51/5016 , H01L51/506 , H01L51/5076 , H01L51/5088 , H01L51/5092 , H01L51/5096 , H01L51/5206 , H01L51/5221 , H01L2251/308 , H05B33/14
Abstract: An OLED device comprises a cathode, an anode, and located therebetween a light-emitting layer containing a host material and a tris-C^N-cyclometallated complex of Ir or Rh wherein at least one of the ligands comprises a substituted quinazoline moiety. The device provides useful emission and stability attributes.
Abstract translation: OLED器件包括阴极和阳极，并且位于其间包含主体材料和Ir或Rh的tris-C 3 N-环金属化络合物的发光层，其中至少一个配体包含取代的喹唑啉部分。 该设备提供有用的排放和稳定性属性。
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公开(公告)号：US08896505B2
公开(公告)日：2014-11-25
申请号：US12483310
申请日：2009-06-12
Applicant: Ronald S. Cok , Michael E. Miller
Inventor： Ronald S. Cok , Michael E. Miller
CPC classification number: G09G3/20 , G09G3/2088 , G09G3/3208 , G09G2300/0426 , G09G2300/0452 , G09G2320/0233 , G09G2320/0285 , H01L27/3255
Abstract: A display, including a substrate having a display area including first and second non-overlapping pixel groups and a gutter located between the first and second pixel groups, the gutter having a dimension in a first direction separating the first and second pixel groups, and each pixel group includes a plurality of pixels, each pixel having three or more differently colored sub-pixels; and wherein the pixel centers of the pixels in each pixel group are arranged in a regular two-dimensional array having one dimension parallel to the first direction, and wherein the pixels within a pixel group are separated by an inter-pixel separation in the first direction; and one or more electrical elements arranged within the gutter, each subpixel being connected to one of the one or more electrical elements, wherein the gutter dimension is greater than the inter-pixel separation, so that artifacts in a displayed image are reduced.
Abstract translation: 一种显示器，包括具有包括第一和第二非重叠像素组的显示区域和位于第一和第二像素组之间的沟槽的衬底，沟槽具有在分离第一和第二像素组的第一方向上的尺寸，以及每个 像素组包括多个像素，每个像素具有三个或更多个不同颜色的子像素; 并且其中每个像素组中的像素的像素中心以具有与第一方向平行的一个维度的规则的二维阵列排列，并且其中像素组中的像素在第一方向上被分离像素间隔 ; 以及布置在沟槽内的一个或多个电气元件，每个子像素连接到所述一个或多个电气元件中的一个或多个电气元件中，其中沟槽尺寸大于像素间间隔，使得显示图像中的伪影减小。
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5.发明授权Display device with compensation for variations in pixel transistors mobility 有权具有补偿像素晶体管移动性变化的显示器件公开(公告)号：US08816943B2
公开(公告)日：2014-08-26
申请号：US13123696
申请日：2009-10-05
Applicant: Kazuyoshi Kawabe
Inventor： Kazuyoshi Kawabe
IPC: G09G3/30
CPC classification number: G09G3/3233 , G09G2300/0417 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2320/0233
Abstract: In order to efficiently execute threshold value compensation for a driving transistor, a coupling capacitor has one end connected to a data line. Another end of the coupling capacitor is connected to a selection transistor and one end of a reset transistor. A control terminal of a driving transistor is connected to the other end of the selection transistor, and an organic EL element is connected to this driving transistor via a light emission control transistor. A data voltage, corresponding to a gradation signal supplied to the data line, is written to a storage capacitor via the coupling capacitor, and with the selection transistor and the light emission control transistor in an off state and the reset transistor turned on, a compensation voltage corresponding to a degree of mobility of the driving transistor is written to the coupling capacitor.
Abstract translation: 为了有效地对驱动晶体管执行阈值补偿，耦合电容器的一端连接到数据线。 耦合电容器的另一端连接到选择晶体管和复位晶体管的一端。 驱动晶体管的控制端子连接到选择晶体管的另一端，并且有机EL元件经由发光控制晶体管连接到该驱动晶体管。 对应于提供给数据线的灰度信号的数据电压通过耦合电容器写入存储电容器，并且选择晶体管和发光控制晶体管处于截止状态并且复位晶体管导通，补偿 对应于驱动晶体管的迁移率的电压被写入耦合电容器。
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Patent Agency Ranking
公开(公告)号：US08803857B2
公开(公告)日：2014-08-12
申请号：US13024771
申请日：2011-02-10
Applicant: Ronald S. Cok
Inventor： Ronald S. Cok
IPC: G06F3/038
CPC classification number: G09G3/3208 , G09G2300/026 , G09G2300/0426 , G09G2300/0828 , H01L27/3255
Abstract: A digital display apparatus includes an array of light-emitting pixels, each with a first and second electrode, formed on a display substrate. A plurality of chiplets is located on the display substrate, each chiplet including an electrode connection pad, a signal connection pad, and a pixel circuit. The electrode connection pad is connected to one of the first or second electrodes. Each chiplet includes one or more pixel circuits formed in the chiplet and electrically connected to the corresponding electrode and signal connection pads. A digital image signal is provided to the signal connection pad(s) of at least one of the chiplets. Each pixel circuit converts at least one digital image signal value to a continuously valued analog pixel-driving signal that controls the luminance of a pixel. The display provides higher-performance pixel circuits with digital control resulting in improved image quality.
Abstract translation: 数字显示装置包括形成在显示基板上的发光像素阵列，每个发光像素具有第一和第二电极。 多个小芯片位于显示基板上，每个小电极包括电极连接焊盘，信号连接焊盘和像素电路。 电极连接垫连接到第一或第二电极之一。 每个小灯包括一个或多个像素电路，形成在小电池中并电连接到相应的电极和信号连接焊盘。 数字图像信号被提供给至少一个小芯片的信号连接垫。 每个像素电路将至少一个数字图像信号值转换成控制像素的亮度的连续值的模拟像素驱动信号。 该显示器提供具有数字控制的更高性能像素电路，从而提高图像质量。
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公开(公告)号：US08754882B2
公开(公告)日：2014-06-17
申请号：US13508713
申请日：2010-11-04
Applicant: Yuichi Maekawa , Koichi Miwa
Inventor： Yuichi Maekawa , Koichi Miwa
CPC classification number: G09G3/006 , G09G3/3233 , G09G2300/0842 , G09G2310/0251
Abstract: Compensate for the variations of threshold voltage of a driving transistor. During the period of the reference signal voltage Vref being set to the signal line DTC, voltage between the gate and source of the driving transistor 10C is made equal to or greater than the threshold voltage of the driving transistor 10C, and the difference in voltage of the reference signal voltage Vref and the reference power supply voltage Vref_r is charged to the retentive capacitance 10B. At the same time, the voltage of the source of the said driving transistor 10C is set to the reference power supply voltage Vref_r to make the voltage applied to the light emitting element 10E equal to or lower than its threshold voltage, a voltage corresponding to the threshold voltage of the driving transistor 10C is held in the retentive capacitance 10B. During a period of time when a display signal voltage is set to the signal line DTC, the sampling transistor 10A is conducting, so as to sample the signal voltage, and this signal voltage is superposed on the threshold voltage held in the retentive capacitance.
Abstract translation: 补偿驱动晶体管的阈值电压的变化。 在参考信号电压Vref设定为信号线DTC的期间，使驱动晶体管10C的栅极与源极之间的电压等于或大于驱动晶体管10C的阈值电压， 参考信号电压Vref和参考电源电压Vref_r被充电到保持电容10B。 同时，将驱动晶体管10C的源极的电压设定为基准电源电压Vref_r，使施加到发光元件10E的电压等于或低于其阈值电压，对应于 驱动晶体管10C的阈值电压被保持在保持电容10B中。 在显示信号电压被设定为信号线DTC的时间段期间，采样晶体管10A导通，以对信号电压进行采样，并将该信号电压叠加在保持在保持电容中的阈值电压上。
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公开(公告)号：US08711138B2
公开(公告)日：2014-04-29
申请号：US12746900
申请日：2008-12-01
Applicant: Kazuyoshi Kawabe
Inventor： Kazuyoshi Kawabe
IPC: G09G5/00
CPC classification number: H01L27/3265 , G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/0262
Abstract: A pixel circuit for an electroluminescent element with a first storage capacitor formed overlapping a data line and which comprises a section where a semiconductor thin film constituting the switching transistor or the reset transistor extends, an insulating film, and a metal layer which is connected to the data line as a first terminal. A first terminal of a switching transistor and a first terminal of a reset transistor are connected to the second terminal of the first storage capacitor. The second terminal of the switching transistor is connected to a driving transistor. A second storage capacitor connects the control terminal and the first terminal of the switching transistor. The electroluminescent element is connected to the second terminal of the driving transistor through a light emission controlling transistor.
Abstract translation: 一种用于具有第一存储电容器的电致发光元件的像素电路，其形成为与数据线重叠，并且包括构成开关晶体管或复位晶体管的半导体薄膜延伸的部分，绝缘膜和与 数据线作为第一个终端。 开关晶体管的第一端子和复位晶体管的第一端子连接到第一存储电容器的第二端子。 开关晶体管的第二端子连接到驱动晶体管。 第二存储电容器连接控制端子和开关晶体管的第一端子。 电致发光元件通过发光控制晶体管连接到驱动晶体管的第二端子。
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公开(公告)号：US08624882B2
公开(公告)日：2014-01-07
申请号：US13024799
申请日：2011-02-10
Applicant: Ronald S. Cok , John W. Hamer , Michael E. Miller
Inventor： Ronald S. Cok , John W. Hamer , Michael E. Miller
IPC: G06F3/038
CPC classification number: G09G3/2085 , G09G3/3208 , G09G2300/026 , G09G2300/0426 , G09G2300/0809 , G09G2300/0842
Abstract: A digital display device includes a display substrate; an array of pixels formed on the display substrate; an array of driving circuits located on the display substrate, each driving circuit electrically connected to one or more pixels for controlling a pixel current provided to each pixel; an array of computing circuits located on the display substrate, each computing circuit including circuits for signal or image processing and for communicating with neighboring computing circuits; a plurality of electrical conductors formed on the display substrate and connected to each of the driving circuits and digital computing circuits, wherein each computing circuit is connected with an electrical conductor to each of its neighbors in the array of computing circuits; and means for providing an image signal connected to one or more of the electrical conductors.
Abstract translation: 数字显示装置包括显示基板; 形成在所述显示基板上的像素阵列; 驱动电路阵列，位于显示基板上，每个驱动电路电连接到一个或多个像素，用于控制提供给每个像素的像素电流; 位于显示基板上的计算电路阵列，每个计算电路包括用于信号或图像处理并用于与相邻计算电路进行通信的电路; 形成在显示基板上并连接到每个驱动电路和数字计算电路的多个电导体，其中每个计算电路与计算电路阵列中的每个相邻电导体连接; 以及用于提供连接到一个或多个电导体的图像信号的装置。
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公开(公告)号：US09620721B2
公开(公告)日：2017-04-11
申请号：US14175242
申请日：2014-02-07
Applicant: Global OLED Technology LLC
Inventor： Kevin P. Klubek , Liang-Sheng Liao , Viktor V. Jarikov , Denis Y. Kondakov , William J. Begley , Michele L. Ricks
CPC classification number: H01L51/0058 , H01L51/0052 , H01L51/0059 , H01L51/006 , H01L51/0081 , H01L51/5012 , H01L2251/308
Abstract: An OLED device comprises a cathode, an anode, and has therebetween a light-emitting layer wherein the light-emitting layer comprises (a) a 2-arylanthracene compound and (b) a light-emitting second anthracene compound having amino substitution at a minimum of two positions, wherein at least one amine is substituted at the 2 position of the second anthracene compound.
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