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公开(公告)号：US20240143532A1
公开(公告)日：2024-05-02
申请号：US18404543
申请日：2024-01-04
IPC分类号： G06F13/36
CPC分类号： G06F13/36 , G06F2213/40
摘要： A storage controller implemented on a System On Chip (SOC) includes an upstream functional module, a host interface, a logical to physical (L2P) interface, and a message inspection engine. The configured message inspection engine is obtained using one or more configuration settings and receives an input message from the upstream functional module. The input message is analyzed to determine a retention plan, a content modification plan, and a destination control plan. An output message is generated based at least in part on the input message, the content modification plan, and the destination control plan. If there is an affirmative content modification decision, the output message is populated with content absent from the input message. If there is an affirmative destination modification decision, the output message is populated with a destination absent from the input message. The output message is output unless there is an affirmative retention decision.
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公开(公告)号：US20240134689A1
公开(公告)日：2024-04-25
申请号：US18505464
申请日：2023-11-09
发明人： Priyanka Nilay Thakore , Chen Xiu , Lyle E. Adams , Deqiang Yang
IPC分类号： G06F9/48
CPC分类号： G06F9/4881
摘要： A hardware functional module performs a given task. A first notification that the given task has completed and which includes a scoreboard identifier is sent to a scoreboard module. The scoreboard module selects a scoreboard counter based on the scoreboard identifier. The selected scoreboard counter is incremented. It is determined whether the selected scoreboard counter exceeds a corresponding scoreboard threshold. If the selected scoreboard counter exceeds the corresponding scoreboard threshold, a second notification indicating that the plurality of tasks has completed is sent. If the scoreboard identifier corresponds to the host command module, the second notification is sent to the host command module. If the scoreboard identifier corresponds to the backend command module, the second notification is sent to the backend command module.
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公开(公告)号：US11907147B1
公开(公告)日：2024-02-20
申请号：US18216987
申请日：2023-06-30
IPC分类号： G06F13/36
CPC分类号： G06F13/36 , G06F2213/40
摘要： A message inspection engine, implemented in hardware in a System on Chip (SOC), is configured using configuration information to obtain a configured message inspection engine. An input message is received at the configured message inspection engine from an upstream functional module in the SOC. The configured message inspection engine is used to analyze the input message to determine a content modification plan and a destination control plan and to generate an output message based at least in part on the input message, the content modification plan, and the destination control plan, including by populating the output message with a downstream functional module specified by the destination control plan. The output message is output from the configured message inspection engine.
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公开(公告)号：US11899984B1
公开(公告)日：2024-02-13
申请号：US18195518
申请日：2023-05-10
发明人： Priyanka Nilay Thakore , Chen Xiu , Zhikai Chen , Lyle E. Adams
IPC分类号： G06F3/06
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0673
摘要： A message that includes a queue identifier (ID) is received from a first hardware functional module. A virtual queue is selected from a plurality of virtual queues in a shared queue structure based at least in part on the queue ID and configurable message handling settings(s). The message is stored in the selected virtual queue and a message recipient is selected from a plurality of potential message recipients based at least in part on the configurable message handling setting(s), where the plurality of potential message recipients includes the second hardware functional module and the processor module. The message is provided to the selected message recipient.
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公开(公告)号：US20230221894A1
公开(公告)日：2023-07-13
申请号：US18124208
申请日：2023-03-21
IPC分类号： G06F3/06
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0634 , G06F3/0679
摘要： A hardware-implemented, pre-sequence execution checker is used to receive a set of firmware instructions that includes a suspend command, an intervening command, and a resume command, wherein the suspend command and the resume command are associated with suspending and resuming a same command, respectively; access a configurable conditions table that includes whether the suspend command and the resume command are supported by a storage media device; access state information that includes whether said same command has completed; and determine whether to perform or skip the suspend command based at least in part on the configurable conditions table and the state information. If it is determined to perform the suspend command, the suspend command and the intervening command are output. If it is determined to skip the suspend command, the intervening command is output.
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公开(公告)号：US11693461B1
公开(公告)日：2023-07-04
申请号：US17989292
申请日：2022-11-17
发明人： Zhikai Chen
摘要： A signal receiving circuit receives a reset configuration signal from an exceptional timing sequence device in a functional module and outputs a trigger signal. A first signal generation circuit generates an idle signal based at least in part on the trigger signal. The idle signal is used to configure a shutdown signal which in turn is used to shut down a first clock signal of the exceptional timing sequence device and a second clock signal in a same clock domain as the first clock signal. A second signal generation circuit generates a reset enable signal based at least in part on the trigger signal. An operational circuit performs an operation based at least in part on the reset enable signal and generates a module-based reset signal based at least in part on an operation result. The module-based reset signal is used to reset the exceptional timing sequence device in the functional module.
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公开(公告)号：US11620176B2
公开(公告)日：2023-04-04
申请号：US17858443
申请日：2022-07-06
发明人： Chen Xiu , Priyanka Nilay Thakore , Meng Kun Lee
摘要： An interface receives reported information from a system on chip (SOC), where the reported information includes: (1) hardware-reported information that is reported by a hardware functional module included in the SOC and (2) firmware-reported information that is reported by a firmware functional module included in the SOC. A processor receives one or more display settings and generates visual information based at least in part on: (1) the one or more display settings, (2) the hardware-reported information, and (3) the firmware-reported information. The visual information is displayed via a display.
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公开(公告)号：US20230035289A1
公开(公告)日：2023-02-02
申请号：US17588721
申请日：2022-01-31
发明人： Priyanka Nilay Thakore , Lyle E. Adams , Chen Xiu
IPC分类号： H04L47/70
摘要： Central processing units (CPUs) are configured to support host access instruction(s) that are associated with accessing solid state storage. A resource management module, implemented independently of the CPUs, receives a resource allocation request that includes a usage type identifier and requested amount of a resource, where the usage type identifier is associated with a group identifier. Adjustable resource configuration information is accessed to obtain: (1) a maximum associated with the usage type identifier, (2) a minimum associated with the usage type identifier, and (3) a group limit associated with the group identifier. Resource state information is accessed and it is determine whether to grant the request based at least in part on the maximum, minimum, group limit, and resource state information. The resource allocation request is then granted or denied based on the determination.
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公开(公告)号：US20240113860A1
公开(公告)日：2024-04-04
申请号：US18538611
申请日：2023-12-13
发明人： Xiaojun Ding , Zhikai Chen
IPC分类号： H04L9/06
CPC分类号： H04L9/0631
摘要： 1. Each of a plurality of data processing units independently performs an end-to-end encryption operation associated with AES on a data block. The number of data processing units is selected based at least in part on a desired processing throughput rate and power consumption, where the number of data processing units and the selected key length produce a total processing throughput rate that is a multiple of 1/10, 1/12 or 1/14 of a maximum throughput rate. A target data processing unit is selected, including by sequentially communicating with the data processing units in round-robin order to obtain an idle state information until an idle data processing unit is encountered. The target data processing unit generates a ciphertext data block corresponding to the target data block, including by performing all SubByte, ShiftRow, MixColumn, and AddRoundKey transformations.
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公开(公告)号：US20240056289A1
公开(公告)日：2024-02-15
申请号：US18081416
申请日：2022-12-14
发明人： Xiaojun Ding , Zhikai Chen
IPC分类号： H04L9/06
CPC分类号： H04L9/0631
摘要： A scheduler is used to control a target data processing unit among a plurality of data processing units in order to receive a target data block that is to be encrypted. Each of the plurality of data processing units is able to independently complete an encryption operation associated with Advanced Encryption Standard (AES) for a data block. A ciphertext data block corresponding to the target data block is generated, including by performing the encryption operation associated with AES on the target data block using the target data processing unit.
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