Abstract:
A power amplifier integrated circuit includes a plurality ofheterojunction bipolar transistors having a plurality of bases, a plurality of ballast resistors, and a capacitor. Each ballast resistor is connected between a base of the transistors and a DC node to which a DC voltage is applied. The capacitor is connected between an RF node, which supplies an RF signal, and the plurality of bases of the transistors. The capacitor provides a distinct path for the RF input signal having a substantially high capacitance, so that the RF input signal does not suffer significant signal loss.
Abstract:
An improved bipolar transistor power amplifier circuit including a bias input node, an RF input node, an RF output node, and a plurality of HBTs. Each HBT includes a base, an emitter, a collector, a base resistor connected to the base and selected to offset a portion of the voltage drop across the base and emitter of each transistor, an emitter resistor connected to the emitter, and a base capacitor having two electrodes one of which is coupled to the base. The HBTs are grouped together in two or more groups and each group includes a base resistor selected to offset another portion of the voltage drop across the base and emitter of the transistors. The base resistors are coupled to the bias input node, the collectors of each HBT are coupled to the RF output node, and the other electrode of each base capacitor is coupled to the RF input node resulting in a power amplifier with HBT base resistors which do not have to be large enough to provide all of the thermal protection and do not have to dissipate as much power resulting in a more compact layout.
Abstract:
A low noise amplifier (500) is provided for amplifying signals in a frequency band. The low noise amplifier (500) comprises several amplifying elements (505, 506) that share a load impedance (503) and a degeneration impedance (504). One of the amplifying elements (505, 506) is activated at a time that the rest are deactivated. The activation and deactivation is done by feeding a bias to a bias port (501, 507) or grounding the same, respectively. A signal to be amplified is fed to the corresponding input (511, 512) depending on which of the amplifying elements (505, 506) is activated. An amplified signal is obtained at an output (513).
Abstract:
A Doherty amplifier system including a quarter wave transformer/combiner circuit which may be implemented as a low cost radio frequency integrated circuit, thereby absorbing and minimizing the effects of parasitics such as bond wires and stray capacitance. The quarter wave transformer/combiner circuit may be a lumped pi network configured as an integral number of sections coupled in parallel, with each such section comprising a series combination of a shunt inductance, series capacitance, and shunt inductance. The circuit may also provide bias voltage to the carrier and peaking amplifiers and/or maintain DC isolation therebetween. The circuit may also decrease the load impedance presented to the carrier amplifier as input power increases, thus allowing the efficiency of the system to be kept relatively constant over a prescribed power range.
Abstract:
A differential transimpedance amplifier includes a differential transconductance stage to provide a current to a differential transimpedance stage. The differential transimpedance stage includes two gain stages and provides a voltage. A first feedback element is coupled in parallel with the differential transimpedance stage.
Abstract:
A power amplifier includes drains and sources of a plurality of transistors connected to each other to produce a plurality of common drains and a plurality of common sources, wherein the common drains are connected at a common drain point and wherein the common drain point is connected via an RF choke to a power supply voltage terminal and wherein the common sources are grounded; an output terminal connected to the RF choke; a plurality of bias terminals each coupled via a resistor to the gate of one of the plurality of transistors wherein each of the gates of the plurality of transistors is also capacitively coupled to a radio frequency input.
Abstract:
The present invention, generally speaking, provides a highly efficient RF power amplifier having a large output dynamic range. The amplifier avoid the large power dissipation that occurs in the LINC combiner at lower output levels. In general, this is achieved by using power-controlled switch-mode power amplifiers to vary output power at large power outputs, and reverting to LINC only at low output powers. Thus the present invention achieves the desirable combination of high efficiency at all output powers, while maintaining the fine output power control of the LINC method. More particularly, the power amplifier is based on a highly efficient structure in which amplitude modulation/power control of the output of an RF amplifier is achieved by operating the amplifier in switch mode and varying the power supply of the amplifier, as described more fully in U.S. patent application Ser. No. 09/637,269 entitled High-Efficiency Modulating RF Amplifier, filed Aug. 10, 2000 and incorporated herein by reference. Such an amplifier behaves quite linearly at high power but may exhibit non-linearity at lower output powers. Good linearity throughout a wide dynamic range, and particularly at low output power, may be achieved by phasing and combining the outputs of two (or more) such amplifiers. At high and medium power, the outputs are combined in-phase, allowing for low-loss, high-efficiency operation. At low power, the outputs are phased such that power subtraction occurs. In this manner, each amplifier may be operated at a power level that exhibits good linearity while producing an output signal of a lower power level that would normally fall within a region of substantial non-linearity.
Abstract:
The present invention includes: a plurality of high-frequency amplifier sections, each being composed of bipolar transistors; capacitors, each corresponding to one of the high-frequency amplifier sections, one end of each capacitor being connected to the bases of the bipolar transistors in the corresponding high-frequency amplifier section, and the other end thereof being connected to a high-frequency signal source; and bias circuits, each corresponding to one of the high-frequency amplifier sections, supplying a bias voltage to the bases of the bipolar transistors of the corresponding high-frequency amplifier section. Each bias circuit has a bias voltage lowering section, which is located close to the bipolar transistors of the corresponding high-frequency amplifier section to reduce the bias voltage in response to a rise in temperature of the bipolar transistors.
Abstract:
An amplifier, in particular an RF amplifier is described having an amplifier input, the amplifier comprises: a first controllable semiconductor having a first controllable mainstream path coupled to first source means for controlling the first mainstream path, and having a first biased control input; and a second controllable semiconductor having a second controllable mainstream path coupled to second source means for controlling the second mainstream path, and having a second control input coupled to the first main stream path and to the amplifier input. Both the first and second mainstream paths are coupled to a common load, and the first and second source means are arranged for controlling input impedance and noise impedance respectively of the amplifier input. This amplifier arrangement allows independent control and optimisation of both the amplifier input impedance and the noise impedance.
Abstract:
A composite amplifier includes a main power amplifier (10) and an auxiliary power amplifier (12), which are connected to a load (26) over a Doherty output network. An attenuator (34) is provided for activating the auxiliary power amplifier (12) before the main amplifier (10) is saturated. Preferably the input drive voltage to the auxiliary power amplifier (12) is increased along a smooth curve as the input signal amplitude to the composite amplifier increases.