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公开(公告)号:US20210223489A1
公开(公告)日:2021-07-22
申请号:US16930702
申请日:2020-07-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chung-Ming Weng , Chen-Hua Yu , Chung-Shi Liu , Hao-Yi Tsai , Cheng-Chieh Hsieh , Hung-Yi Kuo , Chih-Hsuan Tai , Hua-Kuei Lin , Tsung-Yuan Yu , Min-Hsiang Hsu
Abstract: Photonic devices and methods of manufacture are provided. In embodiments a fill material and/or a secondary waveguide are utilized in order to protect other internal structures such as grating couplers from the rigors of subsequent processing steps. Through the use of these structures at the appropriate times during the manufacturing process, damage and debris that would otherwise interfere with the manufacturing process of the device or operation of the device can be avoided.
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公开(公告)号:US20210159217A1
公开(公告)日:2021-05-27
申请号:US16900589
申请日:2020-06-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Hua Yu , Chi-Hui Lai , Tin-Hao Kuo , Hao-Yi Tsai , Chung-Shi Liu
IPC: H01L25/065 , H01L23/31 , H01L23/367 , H01L23/40 , H01L21/56
Abstract: An embodiment includes a first package component including a first integrated circuit die and a first encapsulant at least partially surrounding the first integrated circuit die. The device also includes a redistribution structure on the first encapsulant and coupled to the first integrated circuit die. The device also includes a first thermal module coupled to the first integrated circuit die. The device also includes a second package component bonded to the first package component, the second package component including a power module attached to the first package component, the power module including active devices. The device also includes a second thermal module coupled to the power module. The device also includes a mechanical brace extending from a top surface of the second thermal module to a bottom surface of the first thermal module, the mechanical brace physically contacting the first thermal module and the second thermal module.
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公开(公告)号:US20210134611A1
公开(公告)日:2021-05-06
申请号:US17120458
申请日:2020-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Zi-Jheng Liu , Yu-Hsiang Hu , Jo-Lin Lan , Sih-Hao Liao , Chen-Cheng Kuo , Hung-Jui Kuo , Chung-Shi Liu , Chen-Hua Yu , Meng-Wei Chou
Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.
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公开(公告)号:US20210125885A1
公开(公告)日:2021-04-29
申请号:US16666431
申请日:2019-10-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Chih Chen , Chien-Hsun Lee , Chung-Shi Liu , Hao-Cheng Hou , Hung-Jui Kuo , Jung-Wei Cheng , Tsung-Ding Wang , Yu-Hsiang Hu , Sih-Hao Liao
IPC: H01L23/31 , H01L23/538 , H01L25/065 , H01L23/16 , H01L21/56 , H01L25/00
Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.
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公开(公告)号:US10985101B2
公开(公告)日:2021-04-20
申请号:US16354105
申请日:2019-03-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Chia Lai , Chi-Hui Lai , Tin-Hao Kuo , Hao-Yi Tsai , Chung-Shi Liu , Kuo-Chung Yee , Chen-Hua Yu
IPC: H01L23/48 , H01L23/528 , H01L23/522 , H01L23/538 , H01L25/065 , H01L21/56 , H01L23/00 , H01L23/31
Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes semiconductor dies, an encapsulant and a redistribution structure. The semiconductor dies are disposed side by side. Each semiconductor die has an active surface, a backside surface, and an inner side surface connecting the active surface and the backside surface. The encapsulant wraps the semiconductor dies and exposes the active surfaces of the semiconductor dies. The redistribution structure is disposed on the encapsulant and the active surfaces of the semiconductor dies. The inner side surfaces of most adjacent semiconductor dies face each other. The redistribution structure establishes single-ended connections between most adjacent semiconductor dies by crossing over the facing inner side surfaces of the most adjacent semiconductor dies.
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公开(公告)号:US20210091047A1
公开(公告)日:2021-03-25
申请号:US17113676
申请日:2020-12-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Meng-Tse Chen , Chung-Shi Liu , Chih-Wei Lin , Hui-Min Huang , Hsuan-Ting Kuo , Ming-Da Cheng
IPC: H01L25/065 , H01L21/56 , H01L25/00 , H01L21/768 , H01L23/31 , H01L23/538 , H01L23/00
Abstract: An embodiment is method including forming a first die package over a carrier substrate, the first die package comprising a first die, forming a first redistribution layer over and coupled to the first die, the first redistribution layer including one or more metal layers disposed in one or more dielectric layers, adhering a second die over the redistribution layer, laminating a first dielectric material over the second die and the first redistribution layer, forming first vias through the first dielectric material to the second die and forming second vias through the first dielectric material to the first redistribution layer, and forming a second redistribution layer over the first dielectric material and over and coupled to the first vias and the second vias.
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公开(公告)号:US20210082827A1
公开(公告)日:2021-03-18
申请号:US17107181
申请日:2020-11-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jiun Yi Wu , Chen-Hua Yu , Chung-Shi Liu , Chien-Hsun Lee
IPC: H01L23/538 , H01L23/31 , H01L25/18 , H01L21/56 , H01L23/00
Abstract: A method of forming a semiconductor device includes arranging a semi-finished substrate, which has been tested and is known to be good, on a carrier substrate. Encapsulating the semi-finished substrate in a first encapsulant and arranging at least one semiconductor die over the semi-finished substrate. Electrically coupling at least one semiconductor component of the at least one semiconductor die to the semi-finished substrate and encasing the at least one semiconductor die and portions of the first encapsulant in a second encapsulant. Removing the carrier substrate from the semi-finished substrate and bonding a plurality of external contacts to the semi-finished substrate.
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公开(公告)号:US20210013173A1
公开(公告)日:2021-01-14
申请号:US17034917
申请日:2020-09-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Yu Chen , Chia-Shen Cheng , Hao-Jan Pei , Philip Yu-Shuan Chung , Kuei-Wei Huang , Yu-Peng Tsai , Hsiu-Jen Lin , Ching-Hua Hsieh , Chen-Hua Yu , Chung-Shi Liu
IPC: H01L23/00 , H01L23/31 , H01L23/498 , H01L21/56
Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
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公开(公告)号:US10818614B2
公开(公告)日:2020-10-27
申请号:US16691512
申请日:2019-11-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Meng-Tse Chen , Ching-Hua Hsieh , Chung-Shi Liu , Chih-Wei Lin , Hao-Cheng Hou , Jung-Wei Cheng
Abstract: A package structure including a semiconductor die, a warpage control layer, an insulating encapsulant and a redistribution layer is provided. The semiconductor die has an active surface and a backside surface opposite to the active surface. The warpage control layer is disposed on the backside surface of the semiconductor die, wherein the warpage control layer comprises a material having a Young's Modulus of 100 GPa or more. The insulating encapsulant is encapsulating the semiconductor die and the warpage control layer. The redistribution layer is located on the insulating encapsulant and over the active surface of the semiconductor die.
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公开(公告)号:US20200328169A1
公开(公告)日:2020-10-15
申请号:US16915780
申请日:2020-06-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Hua Yu , Yen-Chang Hu , Ching-Wen Hsiao , Mirng-Ji Lii , Chung-Shi Liu , Chien Ling Hwang , Chih-Wei Lin , Chen-Shien Chen
IPC: H01L23/00 , H01L23/29 , H01L23/31 , H01L21/56 , H01L23/538
Abstract: A method embodiment includes forming a sacrificial film layer over a top surface of a die, the die having a contact pad at the top surface. The die is attached to a carrier, and a molding compound is formed over the die and the sacrificial film layer. The molding compound extends along sidewalls of the die. The sacrificial film layer is exposed. The contact pad is exposed by removing at least a portion of the sacrificial film layer. A first polymer layer is formed over the die, and a redistribution layer (RDL) is formed over the die and electrically connects to the contact pad.
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