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公开(公告)号：US20240371316A1
公开(公告)日：2024-11-07
申请号：US18777590
申请日：2024-07-19
Inventor： Miao LIU , Xueguang HAO , Jingbo XU , Xing YAO , Jingquan WANG , Xinyin WU , Xinguo LI , Zhichong WANG
IPC: G09G3/32 , G09G3/3208 , G09G3/3266
Abstract: A display substrate, including a scan drive control circuit including an input circuit, an output control circuit, and an output circuit; the input circuit is configured to transmit a signal of the signal input terminal to the output control circuit and a signal of the first clock signal terminal or the first voltage terminal to the output control circuit; the output control circuit is configured to store a signal of the first signal terminal, and transmit a signal of the second signal terminal to the first node; or, the output control circuit is configured to store a signal of the second clock signal terminal, and transmit a signal of the second voltage terminal to the first node; the output circuit is configured to output a signal of the first voltage terminal to the signal output terminal, or output the signal of the second voltage terminal to the signal output terminal.
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公开(公告)号：US20240215371A1
公开(公告)日：2024-06-27
申请号：US18596678
申请日：2024-03-06
Inventor： Chen XU , Xueguang HAO , Yong QIAO , Xinyin WU
IPC: H10K59/35 , H10K59/121 , H10K59/131
CPC classification number: H10K59/353 , H10K59/1213 , H10K59/1216 , H10K59/131
Abstract: There is provided a display substrate and a display device. The display substrate includes a first metal layer, a first insulating layer, a metal oxide layer, a second insulating layer and a second metal layer which are stacked; wherein the metal oxide layer comprises a first pattern, a second pattern and a capacitance pattern, the first metal layer comprises a first electrode plate, there is at least a first overlapping region between the first electrode plate and the capacitance pattern to form a first storage capacitor, the second metal layer comprises a second electrode plate, there is at least a second overlapping region between the second electrode plate on the base substrate and the capacitance pattern to form a second storage capacitor, and the first electrode plate and the second electrode plate have same potential.
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公开(公告)号：US20240172508A1
公开(公告)日：2024-05-23
申请号：US18551067
申请日：2022-08-24
Inventor： Jingbo XU , Xueguang HAO , Jingquan WANG , Xinyin WU , Lu BAI
IPC: H10K59/131 , G02F1/1362 , G02F1/1368 , G09G3/3233 , G09G3/3266 , G09G3/36 , H10K59/122 , H10K59/80
CPC classification number: H10K59/131 , G02F1/136286 , G02F1/1368 , G09G3/3233 , G09G3/3266 , G09G3/3677 , H10K59/122 , H10K59/80516 , H10K59/80522 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0286
Abstract: A display substrate and a display panel. The display substrate comprises: a base substrate, wherein the base substrate comprises a display area (10) and a peripheral area (20), which is located at at least one side of the display area (10). The display area (10) comprises pixel units (11), which are arranged in an array, first gate scanning signal lines (E1-Em) and second gate scanning signal lines (RT1-RTm); and the peripheral area (20) comprises a first scanning drive circuit (21), which is connected to the first gate scanning signal lines (E1-Em) by means of first connecting wirings (30), a second scanning drive circuit (22), which is connected to the second gate scanning signal lines (RT1-RTm) by means of second connecting wirings (40), first voltage signal lines (Evgh), which are configured to provide a first voltage, and second voltage signal lines (GNvgh), which are configured to provide a second voltage, wherein the second scanning drive circuit (22) is located at the side of the first scanning drive circuit (21) that is close to the display area (10). The ratio of a second resistance value to a first resistance value is less than the ratio of the average line width of the second voltage signal lines (GNvgh) to the average line width of the first voltage signal lines (Evgh). By means of the display substrate, a difference in a signal delay time brought about by different resistances of different connecting wirings can be reduced.
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公开(公告)号：US20230252945A1
公开(公告)日：2023-08-10
申请号：US18302056
申请日：2023-04-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing YAO , Chen XU , Jingquan WANG , Xinyin WU
IPC: G09G3/3266 , H10K59/126 , H10K59/131
CPC classification number: G09G3/3266 , H10K59/126 , H10K59/131 , G09G2300/0426 , G09G2310/0286
Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, and a first scan driving circuit, a second scan driving circuit and a first power line arranged in sequence, and a first shielding layer and a second shielding layer sequentially arranged on a side of the second scan driving circuit away from the base substrate; the first shielding layer covers at least one transistor in the second scan driving circuit, and the second shielding layer covers at least one transistor of transistors in the second scan driving circuit except the at least one transistor covered by the first shielding layer; and the second shielding layer is also on a side of the first scan driving circuit away from the base substrate, and the second shielding layer covers at least one transistor in the first scan driving circuit.
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公开(公告)号：US20230096411A1
公开(公告)日：2023-03-30
申请号：US17052092
申请日：2020-04-11
Inventor： Xueguang HAO , Yong QIAO , Xinyin WU , Hongfei CHENG
IPC: H10K50/86 , H10K59/38 , H10K59/131 , H10K59/122
Abstract: Disclosed are an OLED display panel and a display device. The OLED display panel includes a substrate, a plurality of light emitting components arranged in an array, and a light resistance structure between the light emitting components. The light resistance structure prevents the reflected light of the emergent light from the light emitting components, from emitting out from one side of the substrate between the light emitting components.
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Patent Agency Ranking
公开(公告)号：US20210256913A1
公开(公告)日：2021-08-19
申请号：US17271319
申请日：2020-07-22
Inventor： Xueguang HAO , Yong QIAO , Xinyin WU
IPC: G09G3/3266 , H01L27/32 , H01L51/52
Abstract: An array substrate has a display area and a peripheral area located outside the display area. The display area includes two first sides that are substantially parallel and arc sides connected to ends of the first sides. The array substrate includes at least one gate driving circuit. Each gate driving circuit includes GOA units sequentially distributed along each arc side in at least one arc side and active GOA units sequentially distributed along a first side connected to the arc side. The GOA units includes at least one active GOA unit and at least one dummy GOA unit. Each active GOA unit is configured to provide a driving signal to at least one sub-pixel. A distance between two adjacent GOA units in the GOA units is approximately same as a distance between two adjacent active GOA units in the active GOA units.
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公开(公告)号：US20210225876A1
公开(公告)日：2021-07-22
申请号：US16762888
申请日：2019-11-25
Inventor： Yongda MA , Xueguang HAO , Xinyin WU , Yong QIAO
Abstract: An array substrate and a display device are provided. The array substrate includes: a substrate body; and a plurality of first signal lines arranged on the substrate body, each first signal line including a first line segment, a second line segment, and a third line segment connecting the first line segment and the second line segment. The plurality of first signal lines is arranged at intervals in a first direction. In a second direction perpendicular to the first direction, a first/second/third region is formed between any two adjacent first/second/third line segments. At least parts of subpixel units are arranged at the first regions and the third regions, and each second line segment is connected to a terminal connection line at a periphery of a non-display region of the substrate body adjoining a display region. At least two adjacent second regions have a same width in the first direction.
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公开(公告)号：US20210210843A1
公开(公告)日：2021-07-08
申请号：US16064933
申请日：2017-11-09
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yongchun LU , Xinyin WU , Pan LI , Jian XU
Abstract: An antenna structure and a communication device are provided. The antenna structure includes a first base substrate, a second base substrate, a dielectric layer disposed between the first base substrate and the second base substrate, and a plurality of first electrodes disposed on a side of the first base substrate close to the dielectric layer and being spaced apart from another. The antenna structure further includes at least one first buffer block disposed between the first electrodes and the first base substrate, the first buffer block is at least partially and directly contacted with the first electrodes.
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公开(公告)号：US20210074193A1
公开(公告)日：2021-03-11
申请号：US16630852
申请日：2019-06-25
Inventor： Xueguang HAO , Yongda MA , Yong QIAO , Xinyin WU
Abstract: Disclosed herein is a shift register, a grid driver circuit and a display device. The shift register may comprise a first pull-down point control circuit having a control end coupled to a pull-up point and two ends coupled to a pull-down point and a first voltage input respectively, a second pull-down point control circuit having two control ends coupled to an input signal and a control input respectively and two ends coupled to the pull-down point and the first voltage input respectively, a first pull-up point control circuit having a control end coupled to the pull-down point and two ends coupled to the pull-up point and the first voltage input respectively, and a second pull-up point control circuit having a control end coupled to a first clock signal and two ends coupled to the pull-up point and the first voltage input respectively.
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90.发明申请公开(公告)号：US20210037683A1
公开(公告)日：2021-02-04
申请号：US16489557
申请日：2019-01-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yongda MA , Xinyin WU , Xueguang HAO
IPC: H05K7/20
Abstract: The present disclosure provides a heat dissipating device for a display panel, a manufacturing method thereof, and a display device. The heat dissipating device may include: a first heat conductor layer located on a side of the display panel away from its display surface, and provided with at least one through hole; and a second heat conductor layer located on a side of the first heat conductor layer away from the display panel, and connected to the display panel through the at least one through hole. A thermal conductivity of the first heat conductor layer in a direction parallel to the display surface and a thermal conductivity of the second heat conductor layer in a direction perpendicular to the display surface are greater than that of the first heat conductor layer in a direction perpendicular to the display surface, respectively.
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