公开(公告)号：US06577006B1

公开(公告)日：2003-06-10

申请号：US09473405

申请日：1999-12-28

申请人： Kiyoshi Oota ,  Nobuhiko Hayashi

发明人： Kiyoshi Oota ,  Nobuhiko Hayashi

IPC分类号： H01L3300

CPC分类号： H01L33/40 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

摘要： An undoped GaN buffer layer, an n-type GaN layer and a p-type GaN layer are successively formed on a sapphire substrate, and a partial region from the p-type GaN layer to the n-type GaN layer is removed, to expose the n-type GaN layer. Ti films having a thickness of 3 to 100 Å and Pt films are successively formed on the p-type GaN layer and on the exposed upper surfaces of the n-type GaN layer. Consequently, a p electrode in ohmic contact with the p-type GaN layer and an n electrode in ohmic contact with the n-type GaN layer are formed without being alloyed by heat treatment.

摘要翻译： 在蓝宝石衬底上依次形成未掺杂的GaN缓冲层，n型GaN层和p型GaN层，并且从p型GaN层到n型GaN层的部分区域被去除，以露出 n型GaN层。 在p型GaN层和n型GaN层的露出的上表面上依次形成厚度为3〜100的Ti膜和Pt膜。 因此，与p型GaN层欧姆接触的p电极和与n型GaN层欧姆接触的n电极形成，而不通过热处理合金化。

公开(公告)号：US06522676B1

公开(公告)日：2003-02-18

申请号：US09492008

申请日：2000-01-27

申请人： Takenori Goto ,  Nobuhiko Hayashi

发明人： Takenori Goto ,  Nobuhiko Hayashi

IPC分类号： H01S500

CPC分类号： B82Y20/00 ,  H01S5/0208 ,  H01S5/021 ,  H01S5/0211 ,  H01S5/0213 ,  H01S5/0658 ,  H01S5/2205 ,  H01S5/2231 ,  H01S5/3211 ,  H01S5/3213 ,  H01S5/34333

摘要： A nitride semiconductor device of the self-pulsation type comprises as superposed on a substrate 1 an n-type cladding layer 3, active layer 4 and p-type cladding layer including an upwardly projecting stripe portion 53, an n-type current blocking layer 6 being formed at each of opposite sides of the stripe portion 53. The stripe portion 53 of the p-type cladding layer 5 comprises an upper stripe portion 51 and a lower stripe portion 52. The upper stripe portion 51 has a minimum width W1 at the position of the boundary between the upper and lower stripe portions 51, 52, and the lower stripe portion 52 has at the position of its lower end a width W2 greater than the minimum width W1 of the upper stripe portion 51. This construction realizes a higher yield than in the prior art.

摘要翻译： 自脉动型氮化物半导体器件包括在基板1上叠加n型包覆层3，有源层4和包括向上突出的条形部分53，n型电流阻挡层6的p型覆层 形成在条形部分53的相对两侧.p型包覆层5的条形部分53包括上条纹部分51和下条纹部分52.上条纹部分51具有最小宽度W1 上条带部分51和下条带部分52和下条部分52之间的边界的位置在其下端的宽度W2大于上条部分51的最小宽度W1的位置。这种结构实现了更高的 产率高于现有技术。

公开(公告)号：US06319742B1

公开(公告)日：2001-11-20

申请号：US09361246

申请日：1999-07-27

申请人： Nobuhiko Hayashi ,  Takashi Kano

发明人： Nobuhiko Hayashi ,  Takashi Kano

IPC分类号： H01L2100

CPC分类号： H01S5/32341 ,  H01L21/31608 ,  H01L33/007 ,  H01S5/0216 ,  H01S5/0217 ,  H01S2304/12

摘要： A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.

摘要翻译： 在蓝宝石衬底上生长GaN层，在GaN层上形成SiO 2膜，然后使用外延横向生长在GaN层和SiO 2膜上生长包括MQW有源层的GaN半导体层。 通过蚀刻除去在SiO 2膜上的区域中的GaN基半导体层，然后在SiO 2膜上的GaN基半导体层的顶表面上形成ap电极，以将p电极连接到GaN基半导体层 涉及GaAs衬底上的欧姆电极。 n电极形成在GaN基半导体层的顶表面上。