公开(公告)号：US5854790A

公开(公告)日：1998-12-29

申请号：US891511

申请日：1997-07-11

Applicant: Craig M. Scott ,  Li Tung Wang ,  Arthur T. Bennett ,  Ahmad Nouri

Inventor： Craig M. Scott ,  Li Tung Wang ,  Arthur T. Bennett ,  Ahmad Nouri

IPC: H04L12/44 ,  H04L12/46 ,  H04L12/56 ,  H04L12/28 ,  G06F15/16 ,  H04L12/413

CPC classification number: H04L12/46 ,  H04L12/44 ,  H04L49/25 ,  H04L49/351

Abstract: A network (10) includes several local networks (32, 34, 36). Each local network (32, 34, 36) includes a repeater (12, 16, 20) coupled to data devices (14, 18, 22). The combination of the repeater (12, 16, 20) and the data devices (14, 18, 22) form a collision domain for managing communications within the local network (32, 34, 36). Uplink modules (40, 44) manage communications between the local networks (32, 34, 36) by isolating collision domains and generating collision indications when messages cannot be transmitted. The uplink modules (40, 44) may also implement bridging, routing, or filtering capabilities that inhibit transmission of an intra-network message beyond its local network (32, 34, 36).

Abstract translation: 网络（10）包括多个本地网络（32,34,36）。 每个本地网络（32,34,36）包括耦合到数据设备（14,18,22）的中继器（12,16,20）。 中继器（12,16,20）和数据设备（14,18,22）的组合形成用于管理本地网络（32,34,36）内的通信的冲突域。 上行链路模块（40,44）通过隔离冲突域来管理本地网络（32,34,36）之间的通信，并且当不能发送消息时产生冲突指示。 上行链路模块（40,44）还可以实现阻止网络内消息超出其本地网络（32,34,36）的传输的桥接，路由或过滤能力。

公开(公告)号：US5838905A

公开(公告)日：1998-11-17

申请号：US903548

申请日：1997-07-30

Applicant: Kevin B. Leigh

Inventor： Kevin B. Leigh

IPC: G06F13/38 ,  G06F15/16

CPC classification number: G06F13/387

Abstract: A PC system uses two different kinds of terminals both of which having different architecture from a traditional PC. A first kind of terminal receives and transmits high resolution information based on a relatively low resolution transmission link. This requires that software and intelligence be distributed between the PC and the terminal itself. A second kind of terminal device receives and transmits low bandwidth information, communicating with the PC or another terminal device, within a confined wireless network, or across another confined wireless network via a wired network. The device can be used within nanocells of coverage, and can move between the covered cells.

Abstract translation: PC系统使用两种不同于传统PC的不同架构的终端。 第一种终端基于相对低分辨率的传输链路接收和发送高分辨率信息。 这要求软件和智能在PC和终端本身之间分配。 第二种类型的终端设备接收和发送低带宽信息，在有限的无线网络内或经由有线网络经由另一密闭无线网络与PC或另一终端设备进行通信。 该器件可以在纳米单元的覆盖范围内使用，并且可以在被覆盖的单元之间移动。

公开(公告)号：US5813030A

公开(公告)日：1998-09-22

申请号：US850370

申请日：1997-05-02

Applicant: Michael Eugene Tubbs

Inventor： Michael Eugene Tubbs

IPC: G06F12/08 ,  G06F12/00

CPC classification number: G06F12/0884

Abstract: A processing system includes a cache memory system which receives an address and a memory request from a processor. Simultaneously, information is accessed responsive to the address from a main memory and from a cache memory. During access of the information from the main memory and cache memory, it is determined whether the desired information is stored in the cache memory. If so, the information is output from the cache memory; if not, the information is output from the main memory.

Abstract translation: 处理系统包括从处理器接收地址和存储器请求的高速缓存存储器系统。 同时，响应于来自主存储器和高速缓冲存储器的地址访问信息。 在从主存储器和高速缓冲存储器访问信息期间，确定所需信息是否存储在高速缓冲存储器中。 如果是，则从高速缓冲存储器输出信息; 如果不是，则从主存储器输出信息。

公开(公告)号：US5727213A

公开(公告)日：1998-03-10

申请号：US434387

申请日：1995-05-03

Applicant: Kerry B. Vander Kamp ,  Roberta W. Hensley ,  Curtis R. Jones

Inventor： Kerry B. Vander Kamp ,  Roberta W. Hensley ,  Curtis R. Jones

IPC: G06F9/445 ,  G06F9/24

CPC classification number: G06F9/4406

Abstract: A computer system capable of booting currently manufacturable CD-ROMs or tapes without altering the ISO standard or requiring special, customized software to perform this function. A CD-ROM developed for booting according to the present invention contains a boot record as defined by the ISO but located at the end of the defined system area. The operating code of the computer scans for a boot record starting at the beginning sector of the CD-ROM and ending at either a default number or the volume descriptor terminator. The floppy disk boot images are contained at the end of the primary volume space and incorporated in the primary volume space, not external to the primary volume space as in the ISO standard. Boot code contained in the boot record determines the size of the volume, and the proper floppy image to be used and then the actual location of the floppy image. Booting of the system then commences using the floppy image.

公开(公告)号：US5519839A

公开(公告)日：1996-05-21

申请号：US956068

申请日：1992-10-02

Applicant: Paul R. Culley ,  Mark Taylor

Inventor： Paul R. Culley ,  Mark Taylor

IPC: G06F12/02 ,  G06F13/16 ,  G06F13/40 ,  G06F12/08

CPC classification number: G06F13/1673 ,  G06F12/0215 ,  G06F13/4018

Abstract: Double buffering operations to reduce host bus hold times when an expansion bus master is accessing the main memory on a host bus of a computer system. A system data buffer coupled between the main memory and the expansion bus includes 256-bit double read and write buffers. A memory controller coupled to the double read and write buffers and to the expansion bus includes primary and secondary address latches corresponding to the double buffers. The memory controller detects access to the main memory, compares the expansion bus address with the primary and secondary addresses and controls the double read and write buffers and the primary and secondary address latches accordingly. During write operations, data to be written to the same line of memory is written to a first of the double write buffers until a write occurs to an address to a different line before data is transferred to main memory. During read operations, a full line is loaded into a first of the double read buffers, and the next full line is retrieved into a second read buffer from main memory if a subsequent read hit occurs in the first read buffer.

公开(公告)号：US5514946A

公开(公告)日：1996-05-07

申请号：US33821

申请日：1993-03-19

Applicant: David S. Lin ,  Michael E. Schneider

Inventor： David S. Lin ,  Michael E. Schneider

IPC: G01R31/36 ,  G06F1/26 ,  H02J7/00 ,  H02J7/04 ,  H01M10/44

CPC classification number: G06F1/263 ,  G01R31/3655 ,  H02J7/0004 ,  H02J7/0077 ,  Y10S320/21

Abstract: A battery pack for a computer system including static memory to maintain battery operating parameters and charge information, a real time clock (RTC) for measuring periods of non-use of the battery and a communication circuit to exchange the battery information with a microcontroller located in the computer system. The static memory, RTC and communication circuit is preferably in the form of a single RAM/RTC chip. The battery pack also includes circuitry to maintain power to the RAM/RTC from the battery if AC power is not available. The microcontroller detects the presence of the battery and retrieves the present time from the RTC, a timestamp indicating time or removal of the battery and other operating parameters and charge information from the battery pack, and controls the charging functions of the battery accordingly. The microcontroller also updates the charge information of the battery pack while performing other housekeeping functions of a DC--DC converter. The microcontroller further controls a switch located in the charge path of the battery to control fast charging. Trickle charge is simulated by pulsing the switch at a predetermined duty cycle and period. The microcontroller may be placed in standby to conserve energy, while also monitoring the standby switch to pull the computer system out of standby mode if the standby switch is pressed. This allows the keyboard controller to be shut off during standby mode to conserve energy.

Abstract translation: 一种用于计算机系统的电池组，包括用于维持电池工作参数和充电信息的静态存储器，用于测量不使用电池的周期的实时时钟（RTC）和用于与位于 计算机系统。 静态存储器，RTC和通信电路优选地是单个RAM / RTC芯片的形式。 如果电源不可用，电池组还包括电池，以便从电池维持RAM / RTC的电源。 微控制器检测电池的存在并从RTC检索当前时间，指示电池的时间或时间戳，以及其他操作参数和电池组的充电信息，并相应地控制电池的充电功能。 微控制器还在执行DC-DC转换器的其他管理功能的同时更新电池组的电荷信息。 微控制器进一步控制位于电池充电路径中的开关以控制快速充电。 通过以预定的占空比和周期脉冲开关来模拟涓流充电。 如果按下待机开关，微控制器可以被置于待机状态以节省能量，同时还监视备用开关以将计算机系统拉出待机模式。 这样可以在待机模式下关闭键盘控制器以节省能源。

公开(公告)号：US5495263A

公开(公告)日：1996-02-27

申请号：US188522

申请日：1994-01-28

Applicant: Scott W. Dalton ,  Doyne L. Metz

Inventor： Scott W. Dalton ,  Doyne L. Metz

IPC: G09G3/18 ,  G09G3/20 ,  G09G3/36 ,  G09G5/00

CPC classification number: G09G5/006 ,  G09G2370/04 ,  G09G2370/042 ,  G09G3/3611

Abstract: A method that identifies the type of LCD panel used in a portable computer system based on the frequency of the oscillator signal of the DC-to-AC inverter in the LCD panel. In this method, only one signal is routed from the LCD panel to the base unit of the portable computer system for the purpose of panel identification. The inverter oscillating signal is used to increment a counter during power on operations. A system counter, which is clocked by a system clock, is used to determine the number of system clocks needed for the panel identification counter to reach a predetermined count. That number is compared with the entries of a table, in which each entry corresponds to a type of LCD panel. In this manner, the type of LCD panel can be identified based on the frequency of the inverter signal. A corresponding entry in a second table is accessed to obtain a table entry for the identified LCD panel to a full table of LCD panel parameters. The table entry is stored in a predetermined location in the Video ROM. During the video power on portion of the BIOS, the video BIOS routines access the predetermined location in the Video ROM to obtain the parameters to properly initialize the video controller.

Abstract translation: 基于LCD面板中的DC-AC逆变器的振荡器信号的频率，识别在便携式计算机系统中使用的LCD面板的类型的方法。 在这种方法中，为了面板识别的目的，只有一个信号从LCD面板路由到便携式计算机系统的基本单元。 逆变器振荡信号用于在上电操作期间增加一个计数器。 由系统时钟计时的系统计数器用于确定面板识别计数器达到预定计数所需的系统时钟数。 该数字与表的条目进行比较，其中每个条目对应于LCD面板的类型。 以这种方式，可以基于逆变器信号的频率来识别LCD面板的类型。 访问第二表中的相应条目以获得用于所识别的LCD面板的表条目到LCD面板参数的完整表。 表条目存储在视频ROM中的预定位置。 在BIOS的视频通电部分期间，视频BIOS例程访问视频ROM中的预定位置以获得参数以适当地初始化视频控制器。

公开(公告)号：US5490155A

公开(公告)日：1996-02-06

申请号：US955923

申请日：1992-10-02

Applicant: David G. Abdoo ,  J. David Cabello

Inventor： David G. Abdoo ,  J. David Cabello

IPC: G06F11/10 ,  G11C29/00

CPC classification number: G06F11/1028

Abstract: A computer system includes an error detection and correction system for detecting and correcting single-bit errors, two-adjacent-bit errors, and four-adjacent-bit errors. Two identical error detection and correction (EDC) circuits are connected to the system memory array, and each EDC circuit is connected to half of the data bits in alternating pairs. Each EDC circuit detects single-bit errors and two-adjacent-bit errors. The EDC circuits are connected to alternating pairs of data bits so that errors of up to four adjacent bits are actually detected and corrected, two bits by the first EDC circuit and two bits by the second. Thus, if one of the x4 DRAMs in a memory array fails, each erroneous data bit from the DRAM is corrected to its original value, and the failure of the DRAM is registered.

Abstract translation: 计算机系统包括用于检测和校正单位错误，二相邻位错误和四相邻位错误的错误检测和校正系统。 两个相同的错误检测和校正（EDC）电路连接到系统存储器阵列，并且每个EDC电路以交替的对连接到一半的数据位。 每个EDC电路检测单位错误和两个相邻位错误。 EDC电路连接到交替的数据位对，使得实际上检测和校正多达四个相邻位的错误，由第一EDC电路两位和第二位的两位。 因此，如果存储器阵列中的一个x4 DRAM失败，则将来自DRAM的每个错误数据位校正为其原始值，并且注册DRAM的故障。

公开(公告)号：US5488572A

公开(公告)日：1996-01-30

申请号：US237778

申请日：1994-05-04

Applicant: Brian V. Belmont

Inventor： Brian V. Belmont

IPC: G06F1/16 ,  G06F15/02 ,  G06F15/177 ,  G06F13/14

CPC classification number: G06F15/0216 ,  G06F1/1632 ,  G06F15/177

Abstract: A notebook computer system for docking to a motorized expansion base unit. Before the actual docking event occurs, the notebook computer system communicates with the expansion base unit via a sense signal, which is provided by the notebook computer to indicate the power state of the notebook computer. If the expansion base unit determines that the notebook computer is in a proper state for docking, it activates its motor to load the notebook computer. Once docked, the notebook computer runs a resource conflict check routine to determine if resource conflicts occur. A fatal conflict occurs when the resource requirements of bus devices connected to the expansion base unit conflict with the resource requirements of a video controller or hard disk drive connected to the notebook computer. When such a fatal conflict occurs, the notebook computer issues a software eject request to expansion base unit. In response, the expansion base unit undocks the notebook computer. A non-fatal conflict occurs when the resource requirements of the expansion base unit devices conflict with the resource requirements of PCMCIA cards inserted into the PCMCIA slots of the notebook computer. Unlike the case of a fatal conflict, the notebook computer responds to a non-fatal conflict by disabling the offending devices in the expansion base unit.

Abstract translation: 用于对接到机动扩展基座单元的笔记本计算机系统。 在实际对接事件发生之前，笔记本计算机系统通过由笔记本计算机提供的感测信号与扩展基座单元通信，以指示笔记本电脑的电源状态。 如果扩展基座单元确定笔记本电脑处于适当的对接状态，则启动其电机以加载笔记本电脑。 一旦停靠，笔记本电脑运行资源冲突检查程序来确定是否发生资源冲突。 当连接到扩展基础单元的总线设备的资源需求与连接到笔记本电脑的视频控制器或硬盘驱动器的资源要求相冲突时，会发生致命冲突。 当发生这样的致命冲突时，笔记本电脑向扩展基地单元发出软件弹出请求。 作为响应，扩展基座拆卸笔记本电脑。 当扩展基站单元设备的资源需求与插入笔记本电脑的PCMCIA插槽的PCMCIA卡的资源需求冲突时，就会发生非致命冲突。 与致命冲突的情况不同，笔记本电脑通过禁用扩展基板单元中的违规设备来响应非致命冲突。

公开(公告)号：US5465360A

公开(公告)日：1995-11-07

申请号：US152241

申请日：1993-11-12

Applicant: David A. Miller ,  Kenneth A. Jansen ,  Paul R. Culley ,  Mark Taylor ,  Javier F. Izquierdo

Inventor： David A. Miller ,  Kenneth A. Jansen ,  Paul R. Culley ,  Mark Taylor ,  Javier F. Izquierdo

IPC: G06F1/24 ,  G06F12/08 ,  G06F15/177 ,  G06F9/00

CPC classification number: G06F12/0802 ,  G06F1/24 ,  G06F15/177

Abstract: A method and system for independently resetting primary and secondary processors 20 and 120 respectively under program control in a multiprocessor, cache memory system. Processors 20 and 120 are reset without causing cache memory controllers 24 and 124 to reset.

Abstract translation: 一种用于在多处理器，高速缓冲存储器系统中的程序控制下分别独立地重置主处理器20和第二处理器120的方法和系统。 复位处理器20和120而不使高速缓冲存储器控制器24和124复位。