公开(公告)号：US20200176550A1

公开(公告)日：2020-06-04

申请号：US16524177

申请日：2019-07-29

Applicant: Samsung Display Co., Ltd.

Inventor： Ilgoo Youn ,  Jaewon Kim ,  Hyunae Park ,  Hyungjun Park ,  Seungwoo Sung ,  Junyong An ,  Nuree Um ,  Youngsoo Yoon ,  Jieun Lee ,  Seunghan Jo

IPC: H01L27/32

Abstract: A display device including: a substrate including a display area, a peripheral area, and a pad area; a first main voltage line in the peripheral area, and a first connector extending from the first main voltage line to the pad area; and a second main voltage line in the peripheral area, and a second connector extending from the second main voltage line to the pad area, wherein each of the first connector and the second connector includes a first and second layer overlapping each other with a first insulating layer therebetween, the first insulating layer is in the display area and the peripheral area, the peripheral area includes an open area exposing the first and second connector and surrounding the display area, and the first insulating layer includes slits between the first and second connector and extending from an end of the first insulating layer toward the display area.

公开(公告)号：US20200176526A1

公开(公告)日：2020-06-04

申请号：US16698864

申请日：2019-11-27

Applicant: Samsung Display Co., Ltd.

Inventor： Youngsoo Yoon ,  Jaewon Kim ,  Hyunae Park ,  Hyungjun Park ,  Seungwoo Sung ,  Nuree Um ,  Ilgoo Youn ,  Jieun Lee ,  Donghyeon Jang ,  Seunghan Jo

IPC: H01L27/32

Abstract: A display panel may include a substrate, pixels, dummy pixels, and voltage lines. The substrate may include a first transmission region for light transmission and/or sound transmission, a non-display area surrounding the first transmission region, and a display area surrounding the non-display area. The pixels may be arranged on the display area and may emit light. The dummy pixels may be arranged on the non-display area, may include a first dummy pixel, and may emit no light. The voltage lines may transmit voltages to the pixels and the dummy pixels. The voltage lines may include a first voltage line and a second voltage line. The first voltage line may be spaced from the second voltage line, may be aligned with the second voltage line, and may overlap the first dummy pixel. The first transmission region may be positioned between the first voltage line and the second voltage line.

公开(公告)号：US10134779B2

公开(公告)日：2018-11-20

申请号：US15684735

申请日：2017-08-23

Applicant: Samsung Display Co., Ltd.

Inventor： Deukjong Kim ,  Jaehak Lee ,  Donghyun Lee ,  Byungsun Kim ,  Yangwan Kim ,  Sunja Kwon ,  Hyunae Park ,  Hyungjun Park ,  Sujin Lee ,  Jaeyong Lee ,  Yujin Jeon

IPC: H01L27/12 ,  H01L27/32 ,  H01L51/00

Abstract: A display device including a substrate including a bending area arranged between a first area and a second area, the substrate being configured to be bent around a bending axis extending in a first direction, a first inorganic insulating layer disposed on the substrate and having a first opening overlapping the bending area, a first organic layer disposed in the first opening, and a plurality of first conductive layers disposed on the first organic layer and extending from the first area to the second area through the bending area, in which wherein at least one edge of the first organic layer overlapping the first conductive layers includes at least one first short circuit prevention pattern.

公开(公告)号：US09995982B2

公开(公告)日：2018-06-12

申请号：US15472796

申请日：2017-03-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hwanyoung Jang ,  Kyunghoe Lee ,  Seongyoung Lee ,  Byoungsun Na ,  Seonkyoon Mok ,  Hyungjun Park

IPC: H01L29/04 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1343 ,  H01L29/786

CPC classification number: G02F1/136286 ,  G02F1/134309 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/134345 ,  G02F2001/134372 ,  G02F2201/123 ,  H01L29/78633

Abstract: A display device including a substrate, a gate line, a data line, a plurality of thin film transistors, a first pixel electrode, and a second pixel electrode. The gate line is disposed on the substrate. The data line is disposed on the substrate. The data line includes a first branch line and a second branch line. The first branch line and the second branch line form a closed loop. The plurality of thin film transistors is connected to the data line. The first pixel electrode is connected to at least one of the plurality of thin film transistors. The second pixel electrode is connected to at least another one of the plurality of thin film transisters. The first pixel electrode and the second pixel electrode are arranged in a substantially diagonal direction with respect to each another. The first branch line is connected to a source electrode of said at least one of the plurality of thin film transistors. The second branch line is connected to a source electrode of said at least another one of the plurality of thin film transistors.