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公开(公告)号：US20220020324A1
公开(公告)日：2022-01-20
申请号：US17333483
申请日：2021-05-28
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Pan XU
IPC: G09G3/3225 , G11C19/28
Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and a display device. The shift register unit includes: an input circuit, a first capacitor circuit, an output circuit, an output pull-down circuit, a coupling circuit, and an inverter circuit. The inverter circuit is coupled to an input control terminal, a first node, a second node, and a first level signal input terminal, and a second level signal input terminal; and used to control to connect or disconnect the second node and the first level signal input under the control of the input control terminal and the first level signal input terminal; also used to control to connect or disconnect the second node and the second level signal input terminal under the control of the first node and the second level signal input terminal.
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公开(公告)号：US20220020322A1
公开(公告)日：2022-01-20
申请号：US17309360
申请日：2020-08-12
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Xuehuan FENG , Zhidong YUAN
IPC: G09G3/3225 , G11C19/28
Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, and a GOA circuit, a source electrode IC and PLG wires arranged on the base substrate, and the PLG wires connect the GOA circuit with the source electrode IC. The GOA circuit transmits a GOA signal, and the GOA signal comprises a cascade signal and a non-cascade signal. The PLG wires comprise a first PLG wire group and at least one second PLG wire group, the first PLG wire group transmits the cascade signal, the second PLG wire group transmits the non-cascade signal, a line width of the first PLG wire group is smaller than that of the second PLG wire group, and the first PLG wire group is located at a side of the second PLG wire group distal to an active area of the base substrate.
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公开(公告)号：US20220013612A1
公开(公告)日：2022-01-13
申请号：US17281266
申请日：2020-08-19
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan XU , Yongqian LI , Guoying WANG , Dacheng ZHANG , Chen XU , Lang LIU , Xing ZHANG , Ling WANG , Yicheng LIN , Ying HAN
IPC: H01L27/32
Abstract: Provided are a display substrate, a manufacturing method thereof and a display apparatus. The display substrate includes multiple sub-pixels, wherein each sub-pixel includes a light-emitting region and a non-light-emitting region, and each sub-pixel is provided with a drive circuit; the drive circuit includes a storage capacitor and multiple transistors; for each sub-pixel, the multiple transistors are in the non-light-emitting region, the storage capacitor is a transparent capacitor, and an orthographic projection of the storage capacitor on a base substrate coincides with the light-emitting region. A first electrode of the storage capacitor is disposed in a same layer as an active layer of the multiple transistors, but in a different layer from source and drain electrodes of the multiple transistors, and a second electrode of the storage capacitor is on a side of the first electrode close to the base substrate.
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公开(公告)号：US20210407609A9
公开(公告)日：2021-12-30
申请号：US16645733
申请日：2019-01-09
Inventor： Xuehuan FENG , Yongqian LI
IPC: G11C19/28 , G09G3/3258
Abstract: A shift register is provided, which includes a blanking input circuit, a blanking control circuit, a blanking pull-down circuit, and a shift register circuit. The blanking input circuit may provide a blanking input signal to a first control node according to a second clock signal. The blanking control circuit may provide a first clock signal to a second control node and maintain a voltage difference between the first control node and the second control node, according to a voltage of the first control node. The blanking pull-down circuit may provide a voltage of the second control node to a pull-down node according to the first clock signal. The shift register circuit may provide a shift signal via a shift signal output terminal and a first drive signal via a first drive signal output terminal according to a voltage of the pull-down node.
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75.发明申请公开(公告)号：US20210335200A1
公开(公告)日：2021-10-28
申请号：US16611295
申请日：2019-01-16
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Meng LI
IPC: G09G3/20 , H03K19/0185 , H03K19/20
Abstract: An OR logic operation circuit and a driving method, a shift register unit, a gate drive circuit, and a display device are provided. The OR logic operation circuit includes: a first inverter, a second inverter, a first control circuit, and a second control circuit. The first inverter is configured to invert a first control signal, which is received, to output a second control signal; the second inverter is configured to invert a third control signal received to output a fourth control signal; the first control circuit is configured to perform first control on a first node and the output terminal to achieve an OR operation and output a first level of an output signal at the output terminal; and the second control circuit is configured to perform second control on the first node and the output terminal to output a second level of the output signal at the output terminal.
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Patent Agency Ranking
公开(公告)号：US20210327339A1
公开(公告)日：2021-10-21
申请号：US17298112
申请日：2020-07-29
Inventor： Xuehuan Feng , Yongqian LI
IPC: G09G3/20
Abstract: A shift register includes a first reset circuit having a first transistor and a second transistor, and a selection control circuit connected to a pull-down node, and control electrodes of the first and second transistors. First electrodes of the first and second transistors are connected to a first voltage terminal, and second electrodes of the first and second transistors are connected to a signal output terminal. The selection control circuit is configured to: control a line between the pull-down node and the control electrode of the first transistor, and a line between the pull-down node and the control electrode of the second transistor to be alternately closed. The first reset circuit is configured to output a voltage of the first voltage terminal to the signal output terminal under control of a potential at the pull-down node transmitted by the selection control circuit.
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公开(公告)号：US20210257393A1
公开(公告)日：2021-08-19
申请号：US16097875
申请日：2018-03-14
Inventor： Can YUAN , Zhenfei CAI , Yongqian LI , Pan XU , Zhidong YUAN , Meng LI , Xuehuan FENG
IPC: H01L27/12 , H01L29/786
Abstract: A thin film transistor structure and a manufacturing method thereof, a circuit structure, a display substrate and a display device are provided. The thin film transistor structure includes: a base plate, and a first thin film transistor and a second thin film transistor stacked on the base plate. The first thin film transistor and the second thin film transistor share a same active layer.
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公开(公告)号：US20210217349A1
公开(公告)日：2021-07-15
申请号：US16648515
申请日：2019-01-02
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: A shift register is provided, which may include a compensation selection circuit, a holding circuit, and N shift register circuits. The hold circuit may hold a blanking input signal. Each of the shift register circuits may include a blanking input circuit and an output circuit. The blanking input circuit may provide a blanking pull-down signal to a first node according to the blanking input signal and a blanking control signal. The output circuit may output a shift signal via a shift signal output terminal and output a first drive signal via a first drive signal output terminal according to a voltage of the first node. The compensation selection circuit may provide, according to a compensation selection control signal and the shift signal from one of the N shift register circuits, the blanking input signal to the holding circuit and the N shift register circuits.
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公开(公告)号：US20210210017A1
公开(公告)日：2021-07-08
申请号：US16643280
申请日：2019-03-01
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3258 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device and a driving method. The shift register unit includes a blank input circuit, a blank pull-up circuit, a display input circuit, and an output circuit. The blank input circuit charges and holds the level of the pull-up control node, the blank pull-up circuit uses a first clock signal to charge a pull-up node, the display input circuit charges the pull-up node, and the output circuit outputs a plurality of output clock signals respectively to a plurality of output terminals. The plurality of output terminals include a shift signal output terminal and a plurality of pixel signal output terminals. The plurality of pixel signal output terminals are configured to respectively output a plurality of pixel signals to a plurality of rows of pixel units.
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公开(公告)号：US20210209995A1
公开(公告)日：2021-07-08
申请号：US16982148
申请日：2020-04-08
Inventor： Xuehuan Feng , Yongqian LI , Xing ZHANG
Abstract: The present disclosure provides a shift register unit, a gate driving circuit and compensation method and driving method thereof, and a display device. The shift register unit includes: a shift register circuit having a detection node, the shift register circuit is configured to receive an input signal and a clock signal, and generate an output signal based on the clock signal under control of the input signal; and a detection circuit coupled to the detection node of the shift register circuit, the detection circuit is configured to generate a detection signal based on a potential of the detection node.
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