公开(公告)号：US20170033429A1

公开(公告)日：2017-02-02

申请号：US15149841

申请日：2016-05-09

Applicant: QUALCOMM Incorporated

Inventor： David Francis Berdy ,  Chengjie Zuo ,  Je-Hsiung Jeffrey Lan ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H01P7/06 ,  H01P7/10

CPC classification number: H01P7/06 ,  H01P7/10

Abstract: An apparatus includes a tunable cavity resonator that includes conductive walls that form a tunable cavity. The tunable cavity has first dimensions when one or more phase change material layers within the tunable cavity have a first state. The tunable cavity has second dimensions when the one or more phase change material layers have a second state.

Abstract translation: 一种装置包括可调谐腔谐振器，其包括形成可调谐空腔的导电壁。 当可调谐空腔内的一个或多个相变材料层具有第一状态时，可调谐空腔具有第一尺寸。 当一个或多个相变材料层具有第二状态时，可调谐腔具有第二维度。

公开(公告)号：US09560745B2

公开(公告)日：2017-01-31

申请号：US14498230

申请日：2014-09-26

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Je-Hsiung Jeffrey Lan ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Chengjie Zuo ,  Jonghae Kim ,  David Francis Berdy

IPC: H01L21/768 ,  H05K1/02 ,  C23F1/02 ,  H05K1/03 ,  H05K1/09 ,  H01L23/00

CPC classification number: H05K1/0271 ,  C23F1/02 ,  H01L21/768 ,  H01L23/562 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/09 ,  H05K2201/0154 ,  H05K2201/0195 ,  H01L2924/00

Abstract: A device includes a stress relief region between at least two stress domains of a substrate (e.g., of a semiconductor die or other integrated circuit). The stress relief region includes a conductive structure electrically coupling circuitries of the stress domains between which the conductive structure is disposed.

Abstract translation: 器件包括在衬底（例如，半导体管芯或其他集成电路）的至少两个应力结构域之间的应力消除区域。 应力消除区域包括导电结构，电耦合应力区域的电路，导电结构设置在该应力区域之间。

公开(公告)号：US09478348B2

公开(公告)日：2016-10-25

申请号：US14313241

申请日：2014-06-24

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Chengjie Zuo ,  David Francis Berdy ,  Jonghae Kim

IPC: H01F5/00 ,  H01F27/29 ,  H01F7/06 ,  H01F27/28 ,  H01F41/04 ,  H01F17/00 ,  H01L23/64 ,  H01L49/02 ,  H01L23/15

CPC classification number: H01F27/2804 ,  H01F17/0013 ,  H01F41/04 ,  H01F2017/002 ,  H01F2017/0073 ,  H01F2017/0086 ,  H01L23/15 ,  H01L23/645 ,  H01L28/10 ,  H01L2924/0002 ,  Y10T29/49075 ,  H01L2924/00

Abstract: Methods and apparatuses, wherein the method forms a first plurality of vias in a substrate, further comprising forming the first plurality of vias to be substantially the same height. The method forms a plurality of conductive traces external to the substrate and couples the plurality of conductive traces to the first plurality of vias: wherein the plurality of conductive traces and the first plurality of vias comprise a plurality of conductive turns and wherein the plurality of conductive turns are in a spiral configuration substantially within a first plane.

Abstract translation: 方法和装置，其中所述方法在基底中形成第一多个通孔，还包括将所述第一多个通孔形成为基本上相同的高度。 该方法在衬底外部形成多个导电迹线，并将多个导电迹线耦合到第一多个通孔：其中多个导电迹线和第一多个通孔包括多个导电匝，并且其中多个导电 匝在基本上在第一平面内的螺旋构造。

公开(公告)号：US20160248149A1

公开(公告)日：2016-08-25

申请号：US14627863

申请日：2015-02-20

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  David Francis Berdy ,  Mario Francisco Velez ,  Chengjie Zuo ,  Changhan Hobie Yun ,  Jonghae Kim

IPC: H01Q1/36 ,  H01Q7/00

CPC classification number: H01Q1/36 ,  H01Q1/2283 ,  H01Q7/00 ,  H05K1/115 ,  H05K1/119 ,  H05K1/165 ,  H05K2201/0979 ,  H05K2201/09845 ,  H05K2201/10098

Abstract: An apparatus includes a substrate package and a three dimensional (3D) antenna structure formed in the substrate package. The 3D antenna structure includes multiple substructures to enable the 3D antenna structure to operate as a beam-forming antenna. Each of the multiple substructures has a slanted-plate configuration or a slanted-loop configuration.

Abstract translation: 一种装置包括衬底封装和形成在衬底封装中的三维（3D）天线结构。 3D天线结构包括多个子结构，以使3D天线结构能够作为波束形成天线工作。 多个子结构中的每一个具有倾斜板配置或倾斜环配置。