公开(公告)号：US07505515B1

公开(公告)日：2009-03-17

申请号：US11117839

申请日：2005-04-29

Applicant: Prashant Choudhary ,  Qian Yu ,  Edem Ibragimov ,  Venu Balasubramonian ,  Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Fabian Giroud

Inventor： Prashant Choudhary ,  Qian Yu ,  Edem Ibragimov ,  Venu Balasubramonian ,  Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Fabian Giroud

IPC: H03K5/159

CPC classification number: H04L25/03057 ,  H04L2025/03484

Abstract: A continuous time equalizer for equalizing an input signal using a feedforward equalizer portion and a feedback equalizer portion is provided that includes: a slicer operable to make bit decisions on a combined output from the feedforward and feedback equalizer portions; an adaptive delay circuit operable to delay the combined output to form a delayed output; and a controller operable to control the delay provided by the adaptive delay circuit such that a first group delay through the slicer and a second group delay through the adaptive delay circuit in response to a sinusoidal form of the input signal are substantially equal.

Abstract translation: 提供了一种用于使用前馈均衡器部分和反馈均衡器部分来均衡输入信号的连续时间均衡器，其包括：限幅器，可操作以对来自前馈和反馈均衡器部分的组合输出进行位决定; 自适应延迟电路，其可操作以延迟组合输出以形成延迟的输出; 以及控制器，其可操作以控制由自适应延迟电路提供的延迟，使得响应于输入信号的正弦形式的通过限幅器的第一组延迟和通过自适应延迟电路的第二组延迟基本相等。

公开(公告)号：US07433399B2

公开(公告)日：2008-10-07

申请号：US10970470

申请日：2004-10-20

Applicant: Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse

Inventor： Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse

IPC: H03H7/30 ,  H03H7/40 ,  H03K5/159

CPC classification number: H04L25/03057 ,  H04L2025/03617

Abstract: Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.

Abstract translation: 公开了系统和方法以自适应地生成用于连续时间最小均方误差均衡器的系数并且校正高增益放大器中的偏移。 一种自适应系数发生器包括一组单独的系数发生器，每一组利用用于第一校正的第一自适应校正信号和用于第二更精确校正的第二自适应校正信号。 用于偏移校正的自适应校正信号可以是电流或电压。 通过使第二自适应校正信号保持恒定（例如将其设置为零）以及调整第一信号直到系数的幅度最小化来设定第一自适应校正信号。 然后通过调整第二信号将第一自适应校正信号保持在其设定值，直到系数的幅度再次最小化来设定第二自适应校正信号。

公开(公告)号：US07379495B2

公开(公告)日：2008-05-27

申请号：US10789702

申请日：2004-02-27

Applicant: Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Edem Ibragimov ,  Fabian Giroud

Inventor： Qian Yu ,  Venugopal Balasubramonian ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse ,  Abhijit G. Shanbhag ,  Edem Ibragimov ,  Fabian Giroud

IPC: H04B3/46

CPC classification number: H04L7/0062 ,  H04L7/0029 ,  H04L25/03057 ,  H04L2025/03503

Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

Abstract translation: 一种用于自适应地引入与数据符号判定电路的信号等待时间相关的补偿信号延迟的装置和方法。 自适应定时控制电路，包括实现为具有相关抽头系数的抽头延迟线的内插混频器，自适应地和基本上匹配数据判决电路的等待时间以在自适应均衡器内使用，从而最小化这样的均方误差 决策电路。 该自适应等待时间用于产生反馈误差信号，反馈误差信号又可由前馈均衡器用于动态调整其自适应滤波器抽头系数。

公开(公告)号：US07339988B1

公开(公告)日：2008-03-04

申请号：US10614587

申请日：2003-07-03

Applicant: Abhijit G. Shanbhag ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Prashant Choudhary ,  Edem Ibragimov ,  Venugopal Balasubramonian ,  Qian Yu ,  Madabusi Govindarajan

Inventor： Abhijit G. Shanbhag ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Prashant Choudhary ,  Edem Ibragimov ,  Venugopal Balasubramonian ,  Qian Yu ,  Madabusi Govindarajan

IPC: H03K5/159 ,  H04B1/10

CPC classification number: H04L25/03063 ,  H04L25/03044 ,  H04L2025/03617

Abstract: Systems and methods are disclosed to provide channel monitoring and/or performance monitoring for a communication channel. For example, in accordance with an embodiment of the present invention, an equalizer is disclosed that equalizes for channel distortions and also provides channel and performance monitoring information, such as for example bandwidth estimation, channel identification, signal-to-noise ratio, chromatic dispersion, and/or polarization-mode dispersion.

Abstract translation: 公开了系统和方法来为通信信道提供信道监测和/或性能监测。 例如，根据本发明的实施例，公开了一种对于信道失真进行均衡的均衡器，并且还提供信道和性能监视信息，例如带宽估计，信道识别，信噪比，色散 ，和/或偏振模色散。

公开(公告)号：US07302461B2

公开(公告)日：2007-11-27

申请号：US10724443

申请日：2003-11-26

Applicant: Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Qian Yu ,  Abhijit Phanse

Inventor： Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Qian Yu ,  Abhijit Phanse

IPC: G06F7/02 ,  H03H11/26

CPC classification number: H03F3/45183 ,  H03F2203/45634 ,  H03F2203/45638 ,  H03H11/265 ,  H03H15/02 ,  H04L2025/03477 ,  H04L2025/03617

Abstract: Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations.

Abstract translation: 系统和方法提供模拟延迟元件，其可以在隔离或级联中使用。 例如，延迟元件可以包括宽带放大器和无源可编程滤波器，其可以在宽的频率范围内提供期望的幅度和组延迟响应，同时容忍工艺变化。

公开(公告)号：US07265623B2

公开(公告)日：2007-09-04

申请号：US10911447

申请日：2004-08-03

Applicant: Jishnu Bhattacharjee ,  Debanjan Mukherjee

Inventor： Jishnu Bhattacharjee ,  Debanjan Mukherjee

IPC: H03F3/45

CPC classification number: H03F3/193 ,  H03F1/42 ,  H03F3/45183 ,  H03F2200/111 ,  H03F2200/36 ,  H03F2200/451 ,  H03F2203/45638 ,  H03F2203/45641 ,  H03F2203/45686 ,  H03F2203/45712

Abstract: A waveform shaping method comprises: (a) receiving link-distorted signal pulses; (b) passing the link-distorted signal pulses through a series of differential amplifiers each have independently tunable, base gains, peak boost gains, boost frequencies and boost bandwidths; and (c) adjusting one or more of the base gains, peak boost gains, boost frequencies and boost bandwidths of the series of differential amplifiers so as to realize a selective and progressive waveform re-shaping of the link-distorted signal pulses. In one embodiment, each amplifier in the series has first and second transistors with respective first and second drain nodes through which sum-constant currents respectively flow; and first and second, variable drain impedances (Zd1, Zd2) coupled to the first and second drain nodes, where each of the variable drain impedances has a non-negligible inductance (L), a non-negligible capacitance (C) and a non-negligible resistance (R), and where at least two of the R, L and C factors are programmably and independently adjustable so that an input voltage versus output voltage transfer function of the differential amplifier can exhibit a peak gain at a corresponding peak boost frequency which is greater than a base gain of the differential amplifier at 0 Hz.

Abstract translation: 波形整形方法包括：（a）接收链路失真的信号脉冲; （b）使链路失真的信号脉冲通过一系列差分放大器，每个差分放大器具有独立的可调谐，基极增益，峰值增益增益，升压频率和升压带宽; 和（c）调整一系列差分放大器的一个或多个基极增益，峰值升压增益，升压频率和升压带宽，以实现链路失真信号脉冲的选择性和逐行波形再整形。 在一个实施例中，该系列中的每个放大器具有第一和第二晶体管，其具有相应的第一和第二漏极节点，并且恒定电流通过该第一和第二漏极节流; 以及耦合到第一和第二漏极节点的第一和第二可变漏极阻抗（Zd 1，Zd 2），其中每个可变漏极阻抗具有不可忽略的电感（L），不可忽略的电容（C）和 不可忽略的电阻（R），并且其中R，L和C因子中的至少两个因素可编程和独立地可调节，使得差分放大器的输入电压对输出电压传递函数可以在相应峰值处显示峰值增益 升压频率大于差分放大器在0 Hz的基极增益。

公开(公告)号：US20070064845A1

公开(公告)日：2007-03-22

申请号：US11553019

申请日：2006-10-26

Applicant: Abhijit Phanse ,  Abhijit Shanbhag

Inventor： Abhijit Phanse ,  Abhijit Shanbhag

IPC: H04B1/10

CPC classification number: H04L25/03057 ,  H04B10/6971 ,  H04L25/03038 ,  H04L25/03878 ,  H04L2025/03624 ,  H04L2025/03656 ,  H04L2025/037

Abstract: A compensation circuit and method for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.

Abstract translation: 用于减少与通过信号传输介质接收的检测数据信号相对应的电数据信号内的ISI产品的补偿电路和方法对电数据信号内的各个ISI产品引入不同的补偿效果。 检测到的数据信号中对应于这种ISI产品的不同数据信号分量可以被选择性和单独地补偿，从而产生补偿数据信号，其中基本上去除了这些单个数据信号分量中的每一个。 可以根据需要补偿单个数据信号分量或数据信号分量的选定组合。

公开(公告)号：US07170274B2

公开(公告)日：2007-01-30

申请号：US10724440

申请日：2003-11-26

Applicant: Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Abhijit Phanse

Inventor： Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Abhijit Phanse

IPC: G05F3/16

CPC classification number: G05F3/30

Abstract: A bandgap reference includes a current source providing a current that is proportional to the sum of a first voltage having a positive-to-absolute-temperature (PTAT) temperature dependency and a second voltage having a complementary-to-absolute-temperature (CTAT) dependency. The bandgap reference further includes a variable resistor comprising a fixed resistor that may be selectively combined with one or more of a plurality of selectable resistors, wherein the first voltage is inversely proportional to the resistance of the variable resistor.

Abstract translation: 带隙基准包括电流源，其提供与具有正绝对温度（PTAT）温度依赖性的第一电压和具有互补绝对温度（CTAT）的第二电压的和成比例的电流， 依赖。 带隙参考还包括可变电阻器，其包括可以与多个可选择电阻器中的一个或多个选择性组合的固定电阻器，其中第一电压与可变电阻器的电阻成反比。

公开(公告)号：US07078969B2

公开(公告)日：2006-07-18

申请号：US11209010

申请日：2005-08-22

Applicant: Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse

Inventor： Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Abhijit Phanse

IPC: H03F3/45

CPC classification number: G06G7/30 ,  H03F3/45183

Abstract: A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0≦r≦1 and such that a second input voltage may be multiplied by the complement factor (1−r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.

公开(公告)号：US20060104342A1

公开(公告)日：2006-05-18

申请号：US11284391

申请日：2005-11-21

Applicant: Abhijit Shanbhag ,  Qian Yu ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Fabian Giroud ,  Venugopal Balasubramonian

Inventor： Abhijit Shanbhag ,  Qian Yu ,  Abhijit Phanse ,  Jishnu Bhattacharjee ,  Debanjan Mukherjee ,  Fabian Giroud ,  Venugopal Balasubramonian

IPC: H03H7/30

CPC classification number: H04L25/03063 ,  H03H21/0012 ,  H03H2021/0096 ,  H04L25/0307 ,  H04L2025/0349 ,  H04L2025/03509 ,  H04L2025/03611

Abstract: An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.