公开(公告)号：US3812469A

公开(公告)日：1974-05-21

申请号：US25290372

申请日：1972-05-12

Applicant: BURROUGHS CORP

Inventor： HAUCK E ,  BIRCHMEIER H ,  KIM D

IPC: G06F11/00 ,  G06F15/177 ,  G06F11/06 ,  G06F15/00

CPC classification number: G06F11/2035 ,  G06F11/2023 ,  G06F15/177

Abstract: This disclosure relates to a multiprocessing system having a plurality of different units including processors, I/O controllers and the like which can be arranged into individual processing groups. A plurality of control buses are provided one for each group, each control bus being coupled to each unit of that group. A control bus configuration unit is provided to receive each of the individual control buses such that any one control bus can be connected to any of the other control buses. In this manner, the multiprocessing system can be partitioned into separate subsystems each of which includes one or more of such processing group.

公开(公告)号：US3729713A

公开(公告)日：1973-04-24

申请号：US3729713D

申请日：1971-08-04

Applicant: IBM

Inventor： IRWIN J

IPC: G06F3/06 ,  G11B20/10 ,  G06F11/06 ,  G06F11/12

CPC classification number: G06F3/0601 ,  G06F2003/0698

Abstract: Improved peripheral I/O devices, such as magnetic tape units and I/O controllers, are provided by selectively gating operational state indicating signals over multiplexed lines to an I/O controlling unit for continuously indicating intermediate operational states. The I/O controller, which may be a microprogrammed controller, responds to the intermediate state indications for monitoring and ensuring the intermediate operational states are properly maintained. Upon termination of the intermediate operational state, the next status of the I/O device is sensed. Supplying intermediate operational state conditions enables the I/O controller to sense when malfunctions have occurred which prevent the device from informing the I/O controller that such malfunctions have, in fact, occurred.

Abstract translation: 通过选择性地将多路复用线上的操作状态指示信号选通到I / O控制单元来提供改进的外围I / O设备，例如磁带单元和I / O控制器，用于连续地指示中间操作状态。 可以是微程序控制器的I / O控制器响应中间状态指示进行监视并确保中间操作状态被适当地维护。 在中间操作状态终止时，感测到I / O设备的下一个状态。 提供中间操作状态条件使得I / O控制器能够检测发生故障的情况，从而阻止设备通知I / O控制器事实上发生了这种故障。

公开(公告)号：US3725877A

公开(公告)日：1973-04-03

申请号：US3725877D

申请日：1972-04-27

Applicant: GEN MOTORS CORP

Inventor： KEIL R

IPC: G06F3/023 ,  G06F3/02 ,  G06F11/06

CPC classification number: G06F3/023

Abstract: A keyboard unit is disclosed for temporarily storing information for subsequent transfer to a computer. The unit includes a plurality of pushbuttons interconnected with a two-digit display through encoding and decoding circuitry, for operator verification of data entered and further includes a shift register memory for temporarily storing the data entered. The shift register memory is programmed by a counter so that the data is sequentially stored in the individual shift registers. The shift registers are operable in either a parallel input or serial output mode under the control of a flip-flop which responds to connection and disconnection of the memory keyboard with a computer. During the temporary storing of data the shift registers operate in a parallel mode. When the keyboard memory is connected with a computer the shift registers are switched to their serial output mode and the data is transmitted to the computer under computer control. A code word is stored in one of the memory shift registers to permit identification of the keyboard memory unit from which the data is being received. In the serial transmission of data to the computer a wrap-around circuit is provided which permits redundant transmission of data for verification by the computer.

Abstract translation: 公开了用于临时存储用于随后传送到计算机的信息的键盘单元。 该单元包括通过编码和解码电路与两位数显示器互连的多个按钮，用于操作者验证输入的数据，并且还包括用于临时存储输入的数据的移位寄存器存储器。 移位寄存器存储器由计数器编程，使得数据被顺序存储在各个移位寄存器中。 在触发器的控制下，移位寄存器可以以并行输入或串行输出模式工作，该触发器响应于存储器键盘与计算机的连接和断开。 在临时存储数据期间，移位寄存器以并行模式运行。 当键盘存储器与计算机连接时，移位寄存器切换到串行输出模式，数据在计算机控制下传输到计算机。 代码字存储在存储器移位寄存器之一中，以允许识别接收数据的键盘存储单元。 在将数据串行发送到计算机时，提供了一种绕线电路，其允许数据的冗余传输以供计算机进行验证。

公开(公告)号：US3611305A

公开(公告)日：1971-10-05

申请号：US3611305D

申请日：1969-02-10

Applicant: SCANDERS ASSOCIATES INC

Inventor： GREENSPAN LAWRENCE E ,  WHITAKER EARL J

IPC: G06F9/48 ,  G06F13/24 ,  G06F11/06

CPC classification number: G06F9/4812 ,  G06F13/24

Abstract: Interrupt indicator means are arranged in a multilevel pyramid configuration. Each level contains interrupt word storage means with each of the additional levels having fewer word storage means than the previous level. An interrupt condition will set a discrete storage means of the word storage means in each level of the pyramid. These discretes are retrieved, their addresses determined in each word storage means and the discrete addresses are combined to give the complete address of the interrupt condition. In addition, the simultaneous occurrence of more than one interrupt condition is sensed, and the address of each such interrupt condition is determined.

公开(公告)号：US3602900A

公开(公告)日：1971-08-31

申请号：US3602900D

申请日：1969-10-03

Applicant: INT STANDARD ELECTRIC CORP

Inventor： DELAIGUE SERGE ,  PAIN ROGER A ,  COGNE PIERRE H ,  RIEUX LOUIS H

IPC: G06F11/18 ,  G06F1/04 ,  G06F1/14 ,  G06F11/16 ,  G06F13/42 ,  G06F15/16 ,  G06F15/177 ,  H03K5/00 ,  H03K5/15 ,  H04L7/02 ,  G06F11/06

CPC classification number: G06F11/1679 ,  G06F1/14 ,  G06F11/2097 ,  G06F13/423

Abstract: In the duplicated data-processing systems, the clock of the ''''reserve'''' unit must normally be synchronized with the one of the ''''inline'''' unit, as long as this latter operates normally. According to the present invention, the clock of the ''''inline'''' unit originates a synchronizing signal periodically, and the clock of the ''''reserve'''' unit delimits a synchronization ''''window.'''' If the synchronizing signal falls into the synchronization window, the setting into synchronism of the ''''reserve'''' unit is made. If not, an alarm signal is given. In this arrangement, if the clock of the ''''inline'''' unit operates at an abnormal rhythm because of a failure, the clock of the reserve unit will not be synchronized to this abnormal rhythm.

公开(公告)号：US3573445A

公开(公告)日：1971-04-06

申请号：US3573445D

申请日：1969-07-07

Applicant: LUDMILA ALEXANDROVNA KORYTNAJA ,  BORIS NICKOAEVICH MALINOVSKY

Inventor： KORYTNAJA LUDMILA ALEXANDROVNA ,  MALINOVSKY BORIS NICKOAEVICH

IPC: G06F11/22 ,  G06F11/04 ,  G06F11/06

CPC classification number: G06F11/22

Abstract: A programmed device for detecting faults in digital computers comprises an interrogation matrix ensuring activation of computer elements checked, an operating signal registration matrix that registers the operating signals arriving from the computer elements checked after their being activated by the interrogation matrix, a noise signal registration matrix, a unit for controlling said matrices, a switching board maintaining the connection between inputs of the computer elements checked and outputs of said interrogation matrix, and between outputs of the elements checked with inputs of said operating signal registration matrix and noise signal registration matrix.