公开(公告)号：US11756609B2

公开(公告)日：2023-09-12

申请号：US17293693

申请日：2019-11-14

Applicant: Jozef Stefan Institute ,  Center of Excellence on Nanoscience and Nanotechnology—Nanocenter, Ljubljana

Inventor： Dragan Mihailovic ,  Damjan Svetin ,  Anze Mraz ,  Rok Venturini

IPC: G11C16/04 ,  G11C11/44 ,  H10N60/30 ,  H10N70/20 ,  B82Y10/00 ,  B82Y25/00

CPC classification number: G11C11/44 ,  H10N60/30 ,  H10N70/253 ,  B82Y10/00 ,  B82Y25/00

Abstract: The invention describes a memory device which combines a switchable resistive element and a superconductor element electrically in parallel. The switchable resistive element comprises an active material, which is switchable between first and second values of electrical resistivity ρ1 and ρ2 at the same temperature, wherein ρ1 is different to ρ2. The superconductor element is operable so that at least part of the superconductor element is switchable from a superconducting state to a non-superconducting state. When the superconductor element is switched from the superconducting state to the non-superconducting state, a current injection is provided through the switchable resistive element capable of switching the switchable resistive element between said first and second values of electrical resistivity.

公开(公告)号：US20230282730A1

公开(公告)日：2023-09-07

申请号：US18196891

申请日：2023-05-12

Applicant: Micron Technology, Inc.

Inventor： Thomas M. Graettinger

IPC: H01L29/66 ,  H01L27/06 ,  H10B63/00 ,  H10N70/00 ,  H10N70/20

CPC classification number: H01L29/66545 ,  H01L27/0688 ,  H10B63/84 ,  H10N70/011 ,  H10N70/253

Abstract: The present disclosure includes methods for replacement gate formation in memory, and apparatuses and systems including memory formed accordingly. An embodiment includes forming a first oxide material in an opening through alternating layers of a second oxide material and a nitride material. An array of openings can be formed through the first oxide material formed in the opening. The layers of the nitride material can be removed. A metal material can be formed in voids resulting from the removal of the layers of the nitride material.

公开(公告)号：US20230210027A1

公开(公告)日：2023-06-29

申请号：US18117755

申请日：2023-03-06

Applicant: International Business Machines Corporation

Inventor： Douglas M. Bishop ,  Martin Michael Frank ,  Teodor Krassimirov Todorov

IPC: H10N70/20 ,  H10N70/00

CPC classification number: H10N70/253 ,  H10N70/021 ,  H10N70/245 ,  H10N70/8416 ,  H10N70/8833

Abstract: A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.