Abstract:
In one embodiment, the present invention is a method for conserving power supplied to a linear feedback shift register (LFSR) long code (LC) generator, the method including steps of operating the LC generator during pre-assigned time slots; shutting off the LC generator during standby periods between the pre-assigned time slots; and priming starting states of the LC generator for synchronization with pre-assigned time slots following a standby period. This embodiment of the present invention enables power to be removed from the LFSR LC generator as well as the LFSR clock. Because the accuracy of the LFSR clock is usually derived from a system master transistor-controlled crystal oscillator (TCXO), and because the LFSR clock operates at a relatively high rate, the TCXO can also be powered down to conserve power. A low frequency, low power clock source can then be used instead of the higher powered clock source and TCXO to maintain operation of the mobile during the mobile sleep state.
Abstract:
In a method for multi-subscriber detection using a RAKE receiver structure, one or more RAKE fingers is or are deactivated in order to reduce the power consumption of the RAKE receiver structure during operation. This makes it possible to considerably reduce the signal processing complexity for equalization, since only those energy-relevant areas of the channel impulse response which are required to ensure a required quality of service (QoS) are included in the JD algorithm.
Abstract:
A searcher receiver (114) includes a sample buffer (202) which stores signal samples loaded using a real time clock. A real time linear sequence generator (RT LSG) (206) stores an initial state and is clocked using the real time clock. The contents of the RT LSG are loaded into a non-real time linear sequence generator (NRT LSG) (208) when sample processing begins. Samples are correlated using a non-real time clock to allow signal processing to be uncoupled from the chip rate. The analog front end (108) may be powered down or tuned to another frequency during non-real time processing.
Abstract:
A despreading circuit which can reduce a circuit scale and power consumption is described. The circuit includes an A/D converter which converts a CDMA modulated analog signal to a digital signal of N bits, and a searcher which defects a synchronization phase from high-order small bits of the N bits and outputs synchronozation phase information to a control circuit. The control circuit transmits a signal for allowing despreading to be performed to a sliding correlator based on the phase information. The sliding correlator despreads the N bit digital signal outputted by the A/D converter and outputs the resulting correlation output as a despreading signal.
Abstract:
A system and method that achieve power savings by turning off all or some of the baseband processing for codes and timeslots that have not been transmitted due to full DTX. When full DTX is detected by reception of a Special Burst (SB), the receiver is turned off for all timeslots and frames for the duration of the Special Burst Scheduling Period (SBSP). The transmitter schedules transmissions following any idle period to start on the boundary of the SBSP. The receiver determines the SBSP and if the transmitter initiates transmissions according to SBSP by reception of several initial full DTX cycles.
Abstract:
A method of using a user equipment (UE) in a wireless time division duplex communication system. The system uses code division multiple access and communicates using communication bursts. Each communication burst has a unique channelization code and a midamble code which is uniquely related to the channelization code, each such midamble code being uniquely related to one or more channelization code. The UE receives communication bursts and detects each midamble code in a received communication burst. The UE determines the channelization codes related to each detected midamble based on a mapping of midamble codes to related channelization codes. The UE detects channelization codes in the received communication burst from among the determined channelization codes. The UE recovers data from the received communication burst based on in part the detected channelization codes. Where all midamble codes are uniquely related to one channelization code, the UE recovers data from the received communication burst based on in part the determined channelization codes without the additional channelization code detection step.
Abstract:
A user equipment (UE) for a wireless time division duplex communication system which uses code division multiple access. The system communicates using communication bursts, each communication burst having a unique channelization code and a midamble code which is uniquely related to the channelization code. Each such midamble code being uniquely related to one or more channelization code. The UE has an antenna for receiving communication bursts and a midamble detector which detects each midamble code in a received communication burst. A logic block determines the channelization codes related to each detected midamble based on a mapping of midamble codes to related channelization codes. A channelization code detector detects channelization codes in the received communication burst from among channelization codes determined by said logic block. A multiuser detection device recovers data from the received communication burst based on in part the channelization codes detected by said channelization code detector. Where all midamble codes are uniquely related to one channelization code, the multiuser detection device recovers data from the received communication burst based on in part the determined channelization codes without the need for the channelization code detector.
Abstract:
There is disclosed a despreading circuit which can reduce a circuit scale and power consumption. In the despreading circuit of the present invention, A/D converter converts a CDMA modulated analog signal to a digital signal of N bits, a searcher detects a synchronization phase from high-order small bits of the N bits and outputs synchronization phase information to a control circuit, the control circuit transmits a signal for allowing despreading to be performed to a sliding correlator based on the phase information, and the sliding correlator despreads the N bit digital signal outputted by the A/D converter and transmits the resulting correlation output as a demodulated signal to the outside.
Abstract:
A direct sequence spread spectrum receiver samples an incoming signal and stores the sample in memory. Prior to sampling and storage, the incoming signal is translated to an IF signal. Also prior to storage, the IF signal is corrected for a frequency offset signal. The frequency offset may be caused by many sources, Doppler shift or local oscillator error, for example. Once the signal is corrected for the frequency offset, the signal sample is stored in memory. The signal sample is read from memory as necessary to process the signal. Such a receiver is useful in global positioning satellite (GPS) signal processing where the incoming signal contains several satellite transmissions encoded with CDMA encoding.
Abstract:
A direct sequence spread spectrum receiver samples an incoming signal and stores the sample in memory. Power is then inhibited to the tuner of the receiver to minimize power consumption. The signal sample may be read from memory when necessary to process the signal without further signal acquisition. Power to other receiver sections may be selectively controlled to minimize power consumption. Such a receiver is useful in global positioning satellite (GPS) signal processing where the receiver has a limited power supply.