Abstract:
An electronic device includes a display panel which includes a plurality of light emitting elements and in which a plurality of areas is defined based on the plurality of light emitting elements, a compensation unit which calculates compensation values for image data provided to each of the plurality of areas, and a control unit which controls the output of the image data provided to the display panel based on the compensation values and the image data, where the control unit may include a correction unit which outputs a correction ratio of each of the plurality of areas based on the compensation values and a comparison unit which determines whether an input current of the image data is in a normal range based on the correction ratio.
Abstract:
An organic light-emitting diode (OLED) display device includes a display panel including a plurality of pixels, the plurality of pixels being grouped into a plurality of pixel blocks, a nonvolatile memory configured to store previous accumulated block degradation information for the plurality of pixel blocks up to a previous driving period, a controller configured to calculate current block degradation information for the plurality of pixel blocks in a current driving period, to calculate current accumulated block degradation information for the plurality of pixel blocks up to the current driving period by adding the current block degradation information to the previous accumulated block degradation information in response to a power control signal indicating a power-off, and to determine whether a sensing operation for each of the plurality of pixel blocks is to be performed by comparing the current accumulated block degradation information for each of the plurality of pixel blocks with a sensing reference degradation amount, and a sensing circuit configured to selectively perform the sensing operation for each of the plurality of pixel blocks.
Abstract:
A driving controller set includes a net power control setter, a data clamper, a data line, and a data driver. The net power control setter may determine a first scale factor for adjusting a grayscale value of (N+1)-th frame data based on a load of N-th frame data and a net power control reference value. N is an integer equal to or greater than two. The data clamper may determine a second scale factor for adjusting a grayscale value of the N-th frame data based on a load of (N−1)-th frame data and the N-th frame data. A data signal may be generated using the first scale factor and/or the second scale factor. The data line may include a conductive material. The data driver may convert the data signal into a data voltage and may output the data voltage to the data line.
Abstract:
A light source apparatus includes a plurality of light source gate lines extending in a first direction, a plurality of light source data lines extending in a second direction crossing the first direction, a plurality of light source emission lines, a plurality of feedback lines and a plurality of light source blocks. At least one of the light source blocks is connected to the light source gate line, the light source data line, the light source emission line and the feedback line.
Abstract:
A display panel driver includes a timing controller and a data driver. The timing controller generates a data signal based on an input image data. The data driver receives the data signal, converts the data signal into a data voltage and outputs the data voltage to a display panel. The data signal includes positive data and negative data. The data driver includes a data skew compensating circuit which samples the positive data using the negative data and compensates a skew of the data signal.
Abstract:
A display apparatus includes a display panel including a plurality of first gate lines, a first gate driver connected to first ends of the plurality of first gate lines, a second gate driver connected to second ends of the plurality of first gate lines, a feedback line connected adjacent to the first end of one of the plurality of first gate lines, and a gate delay sensing circuit connected to the feedback line. The gate delay sensing circuit includes a time-to-digital converter and a digital comparator. The time-to-digital converter converts an activation time of a feedback gate signal into a digital activation value. The feedback gate signal is retrieved from the feedback line. The digital comparator generates a digital delay value based on the digital activation value. The digital delay value indicates resistive-capacitive (“RC”) delay of the one of the plurality of first gate lines connected to the feedback line.
Abstract:
A display apparatus includes: a display panel which displays an image; a data driver which supplies a data voltage to the display panel in response to a polarity control signal, where the polarity control signal controls a polarity of the data voltage; a timing controller which outputs a polarity signal corresponding to a polarity of the data voltage; and a polarity converter which receives a common voltage from a common electrode of the display panel and the polarity signal from the timing controller, where the polarity converter outputs the polarity control signal to the data driver in response to a difference in voltage level between the common voltage from the common electrode and the polarity signal from the timing controller.
Abstract:
A display device includes: a display panel including gate lines, a data lines crossing the gate lines, and pixels connected to the data lines and the gate lines; a data driver configured to drive the data lines; a gate driver configured to drive the gate lines in synchronization with a vertical sync start signal; and a timing controller configured to control the data driver and the gate driver in response to an image signal and a control signal inputted thereto from an outside, where the timing controller outputs the vertical sync start signal to the gate driver, and changes a frequency of the vertical sync start signal when an image signal of a current frame is identical to an image signal shifted from an image signal of a previous frame in a first direction.
Abstract:
A display device includes gate lines, data lines, pixels, a gate driver, a data driver, and a timing controller. The gate lines extend in a first direction. The data lines extend in a second direction crossing the first direction. Each of the pixels is connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines. The gate driver is configured to drive the gate lines. The data driver is configured to drive each data line of the data lines in response to a corresponding data signal. The timing controller is configured to, in response to an image signal and a control signal, apply the corresponding data signals to the data driver and control the gate driver. Each corresponding data signal reflects a kickback compensation value corresponding to a distance between the gate driver and the corresponding data line in the first direction.
Abstract:
A driving controller includes an overcurrent load calculator calculating a load of an input image signal, comparing the load and a reference load, and outputting a first signal corresponding to a first comparison result, an overcurrent reference controller analyzing a grayscale of the input image signal and outputting one of a first reference current signal corresponding to the grayscale and a second reference current signal, whose current level is higher than that of the first reference current signal, as a reference current signal, a current sensor receiving a feedback current signal, comparing a current level of the feedback current signal and a current level of the reference current signal, and outputting a second signal corresponding to a second comparison result, and a voltage controller outputting a voltage control signal for adjusting a voltage level of a driving voltage, based on the first signal and the second signal.