Abstract:
This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer.
Abstract:
This disclosure describes techniques for supporting intra-frame timestamps in a graphics system that performs tile-based rendering. The techniques for supporting intra-frame timestamps may involve generating a timestamp value that is indicative of a point in time based on a plurality of per-bin timestamp values that are generated by a graphics processing unit (GPU) while performing tile-based rendering for a graphics frame. The timestamp value may be a function of at least two of the plurality of per-bin timestamp values. The timestamp value may be generated by a central processing unit (CPU), the GPU, another processor, or any combination thereof. By using per-bin timestamp values to generate timestamp values for intra-frame timestamp requests, intra-frame timestamps may be supported by a graphics system that performs tile-based rendering.
Abstract:
This disclosure describes techniques for using bounding regions to perform tile-based rendering with a graphics processing unit (GPU) that supports an on-chip, tessellation-enabled graphics rendering pipeline. Instead of generating binning data based on rasterized versions of the actual primitives to be rendered, the techniques of this disclosure may generate binning data based on a bounding region that encompasses one or more of the primitives to be rendered. Moreover, the binning data may be generated based on data that is generated by at least one tessellation processing stage of an on-chip, tessellation-enabled graphics rendering pipeline that is implemented by the GPU. The techniques of this disclosure may, in some examples, be used to improve the performance of an on-chip, tessellation-enabled GPU when performing tile-based rendering without sacrificing the quality of the resulting rendered image.
Abstract:
In general, techniques are described for analyzing a command stream that configures a graphics processing unit (GPU) to render one or more render targets. A device comprising a processor may perform the techniques. The processor may be configured to analyze the command stream to determine a representation of the one or more render targets defined by the command stream. The processor may also be configured to, based on the representation of the render targets, and identify one or more rendering inefficiencies that will occur upon execution of the command stream by the GPU. The processor may also be configured to re-order one or more commands in the command stream so as to reduce the identified rendering inefficiencies that will occur upon execution of the command stream by the GPU.
Abstract:
Systems and methods are described including creating a mask that indicates which pixel groups do not need to be loaded from Graphics Memory (GMEM). The mask indicates a pixel group does not need to be loaded from GMEM. The systems and methods may further include rendering a tile on a screen. This may include loading the GMEM based on the indication from the mask and skipping a load from the GMEM based on the indication from the mask.