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公开(公告)号:US11727631B2
公开(公告)日:2023-08-15
申请号:US17482296
申请日:2021-09-22
Applicant: QUALCOMM Incorporated
CPC classification number: G06T15/80 , G06T7/90 , G06T9/00 , G06T15/005
Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may perform a color analysis on at least one first frame of a plurality of frames, the color analysis being performed based on at least one image in the at least one first frame. The apparatus may also generate a frequency map for at least one second frame of the plurality of frames based on the performed color analysis. Further, the apparatus may render the at least one second frame based on the frequency map for the at least one second frame, the at least one second frame being rendered after the at least one first frame.
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公开(公告)号:US11321804B1
公开(公告)日:2022-05-03
申请号:US17071888
申请日:2020-10-15
Applicant: QUALCOMM Incorporated
Inventor: Thomas Edwin Frisinger , Richard Hammerstone , Jonnala Gadda Nagendra Kumar , Avinash Seetharamaiah , Shangmei Yu , Srihari Babu Alla
Abstract: Methods, systems, and devices for graphics processer unit (GPU) operations are described. A device may monitor one or more states of a GPU during a duration. Based on monitoring the one or more GPU states, the device may determine an execution of a GPU command that is common to at least two GPU operations for clearing the GPU buffer. The device may determine whether the GPU clear command has previously been executed during a duration or a GPU cycle in which the device monitored the GPU states. The device may process the GPU clear command based on the determination of whether the GPU clear command has previously been executed. For example, the device may drop the GPU clear command based on the determination or modify a portion of the GPU clear command and execute at least the modified portion of the GPU clear command.
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公开(公告)号:US11145024B2
公开(公告)日:2021-10-12
申请号:US16728591
申请日:2019-12-27
Applicant: QUALCOMM Incorporated
Inventor: Balaji Calidas , Joshua Walter Kelly , Avinash Seetharamaiah , Jonnala Gadda Nagendra Kumar , Hitendra Mohan Gangani
Abstract: Methods, systems, and devices for processing are described. A device may parse a set of layers of a deep neural network. The set of layers may be associated with a set of machine learning operations of the deep neural network. The device may determine one or more layer parameters based on the determined set of layers. In some aspects, the device may determine an execution time associated with executing a shader dispatch based on the one or more layer parameters. The device may batch the shader dispatch to a command buffer based on the execution time and process the command buffer based on the batching. The device may determine a target execution time based on an assembly time associated with the command buffer, a processing time associated with the command buffer, a frequency level associated with processing the command buffer, the one or more layer parameters, or some combination thereof.
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公开(公告)号:US11074082B2
公开(公告)日:2021-07-27
申请号:US16818543
申请日:2020-03-13
Applicant: QUALCOMM Incorporated
Inventor: Christopher Paul Frascati , Rajakumar Govindaram , Hitendra Mohan Gangani , Murat Balci , Lida Wang , Avinash Seetharamaiah , Mansoor Aftab , Rajdeep Ganguly , Josiah Vivona
IPC: G06F9/38 , G06T1/60 , G06F9/30 , G06T1/20 , G06F9/50 , H04N5/235 , H04N9/79 , H04N21/443 , H04N5/232
Abstract: A method for camera processing using a camera application programming interface (API) is described. A processor executing the camera API may be configured to receive instructions that specify a use case for a camera pipeline, the use case defining at least one or more processing engines of a plurality of processing engines for processing image data with the camera pipeline, wherein the plurality of processing engines includes one or more of fixed-function image signal processing nodes internal to a camera processor and one or more processing engines external to the camera processor. The processor may be further configured to route image data to the one or more processing engines specified by the instructions, and return the results of processing the image data with the one or more processing engines to the application.
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公开(公告)号:US20200218541A1
公开(公告)日:2020-07-09
申请号:US16818543
申请日:2020-03-13
Applicant: QUALCOMM Incorporated
Inventor: Christopher Paul Frascati , Rajakumar Govindaram , Hitendra Mohan Gangani , Murat Balci , Lida Wang , Avinash Seetharamaiah , Mansoor Aftab , Rajdeep Ganguly , Josiah Vivona
Abstract: A method for camera processing using a camera application programming interface (API) is described. A processor executing the camera API may be configured to receive instructions that specify a use case for a camera pipeline, the use case defining at least one or more processing engines of a plurality of processing engines for processing image data with the camera pipeline, wherein the plurality of processing engines includes one or more of fixed-function image signal processing nodes internal to a camera processor and one or more processing engines external to the camera processor. The processor may be further configured to route image data to the one or more processing engines specified by the instructions, and return the results of processing the image data with the one or more processing engines to the application.
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公开(公告)号:US20180040095A1
公开(公告)日:2018-02-08
申请号:US15226627
申请日:2016-08-02
Applicant: QUALCOMM Incorporated
Inventor: Avinash Seetharamaiah , Christopher Paul Frascati , Jonnala Gadda Nagendra Kumar , Andrew Evan Gruber , Colin Christopher Sharp , Eric Demers
CPC classification number: G06T1/20 , G06T15/005
Abstract: This disclosure describes techniques for compressing a graphical state object. In one example, a central processing unit may be configured to receive, for output to the GPU, a set of instructions to render a scene. Responsive to receiving the set of instructions to render the scene, the central processing unit may be further configured to determine whether the set of instructions includes a state object that is registered as corresponding to an identifier. Responsive to determining that the set of instructions includes the state object that is registered as corresponding to the identifier, the central processing unit may be further configured to output, to the GPU, the identifier that is registered as corresponding to the state object.
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公开(公告)号:US09165337B2
公开(公告)日:2015-10-20
申请号:US14027816
申请日:2013-09-16
Applicant: QUALCOMM Incorporated
Inventor: Murat Balci , Christopher Paul Frascati , Avinash Seetharamaiah
CPC classification number: G06T1/20 , G06F9/3881 , G06F9/50 , G06F9/5022 , G06T1/60
Abstract: Techniques are described for writing commands to memory units of a chain of memory units of a command buffer. The techniques may write the commands, and if during the writing, it is determined that there is not sufficient space in the chain of memory unit, the techniques may flush previously confirmed commands. If after the writing, the techniques determine that there is not sufficient space in an allocation list for the handles associated with the commands, the techniques may flush previously confirmed commands.
Abstract translation: 描述了将命令写入命令缓冲器的存储器单元链的存储器单元的技术。 这些技术可以写入命令,并且如果在写入期间确定存储器单元链中没有足够的空间,则这些技术可以刷新先前确认的命令。 如果在写入之后,这些技术确定在与命令相关联的句柄的分配列表中没有足够的空间,该技术可以冲洗以前确认的命令。
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公开(公告)号:US12229864B2
公开(公告)日:2025-02-18
申请号:US17817815
申请日:2022-08-05
Applicant: QUALCOMM Incorporated
Inventor: Yun Du , Eric Demers , Andrew Evan Gruber , Chun Yu , Baoguang Yang , Chihong Zhang , Yuehai Du , Avinash Seetharamaiah , Jonnala Gadda Nagendra Kumar , Gang Zhong , Zilin Ying , Fei Wei
Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for runtime optimization of the shader execution flow. A graphics processor may obtain instruction execution data associated with a graphics workload, the instruction execution data including graphics data for a set of shader operations. The graphics processor may configure, at a first iteration, at least one predication value based on the instruction execution data including the graphics data for the set of shader operations. The graphics processor may adjust, at a second iteration, an execution flow of the graphics workload based on the configured at least one predication value, the execution flow of the graphics workload including the set of shader operations. The graphics processor may execute or refrain from executing, at the second iteration, each of the set of shader operations based on the adjusted execution flow of the graphics workload.
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公开(公告)号:US12067666B2
公开(公告)日:2024-08-20
申请号:US17664033
申请日:2022-05-18
Applicant: QUALCOMM Incorporated
Inventor: Yun Du , Eric Demers , Andrew Evan Gruber , Chun Yu , Chihong Zhang , Baoguang Yang , Yuehai Du , Gang Zhong , Avinash Seetharamaiah , Jonnala Gadda Nagendra Kumar
CPC classification number: G06T15/005 , G06T1/60
Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a set of draw call instructions corresponding to a graphics workload, where the set of draw call instructions is associated with at least one run-time parameter. The apparatus may also obtain a first shader program associated with storing data in a system memory and at least one second shader program associated with storing data in a constant memory. Further, the apparatus may execute the first shader program or the at least one second shader program based on whether the at least one run-time parameter is less than or equal to a size of the constant memory. The apparatus may also update or maintain a configuration of a shader processor or a streaming processor based on executing the first shader program or the at least one second shader program.
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公开(公告)号:US11373268B2
公开(公告)日:2022-06-28
申请号:US17039873
申请日:2020-09-30
Applicant: QUALCOMM Incorporated
Inventor: Srihari Babu Alla , Jonnala Gadda Nagendra Kumar , Avinash Seetharamaiah , Andrew Evan Gruber , Richard Hammerstone , Thomas Edwin Frisinger , Daniel Archard
Abstract: The present disclosure relates to methods and apparatus for hybrid rendering of video/graphics content by a graphics processing unit. The apparatus can configure the graphics processing unit of a display apparatus to perform multiple rendering passes for a frame of a scene to be displayed on a display device. Moreover, the apparatus can control the graphics processing unit to perform a first rendering pass of the multiple rendering passes to generate a first render target that is stored in either an on-chip graphics memory of the GPU or a system of the display apparatus. The apparatus can also control the graphics processing unit to perform a second rendering pass to generate a second render target that is alternatively stored in the system memory of the display apparatus or on-chip graphics memory of the GPU.
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