Negative biased substrate for pixels in stacked image sensors
    51.
    发明授权
    Negative biased substrate for pixels in stacked image sensors 有权
    堆叠图像传感器中像素的负偏置衬底

    公开(公告)号:US09344658B2

    公开(公告)日:2016-05-17

    申请号:US14448154

    申请日:2014-07-31

    Abstract: A pixel cell includes a photodiode disposed within a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. A transfer transistor is disposed within the first semiconductor chip and coupled to the photodiode to transfer the image charge from the photodiode. A bias voltage generation circuit disposed within a second semiconductor chip for generating a bias voltage. The bias voltage generation circuit is coupled to the first semiconductor chip to bias the photodiode with the bias voltage. The bias voltage is negative with respect to a ground voltage of the second semiconductor chip. A floating diffusion is disposed within the second semiconductor chip. The transfer transistor is coupled to transfer the image charge from the photodiode on the first semiconductor chip to the floating diffusion on the second semiconductor chip.

    Abstract translation: 像素单元包括设置在第一半导体芯片内的光电二极管,用于响应入射在光电二极管上的光累积图像电荷。 传输晶体管设置在第一半导体芯片内并耦合到光电二极管以从光电二极管传输图像电荷。 偏置电压产生电路,设置在第二半导体芯片内,用于产生偏置电压。 偏置电压产生电路耦合到第一半导体芯片以偏置偏压的光电二极管。 偏置电压相对于第二半导体芯片的接地电压为负。 浮置扩散部设置在第二半导体芯片内。 传输晶体管被耦合以将图像电荷从第一半导体芯片上的光电二极管转移到第二半导体芯片上的浮动扩散。

    Image sensor having NMOS source follower with P-type doping in polysilicon gate
    52.
    发明授权
    Image sensor having NMOS source follower with P-type doping in polysilicon gate 有权
    具有多晶硅栅P型掺杂的NMOS源极跟随器的图像传感器

    公开(公告)号:US09319613B2

    公开(公告)日:2016-04-19

    申请号:US14097779

    申请日:2013-12-05

    Inventor: Tiejun Dai

    Abstract: An image sensor array has a tiling unit comprising a source follower stage coupled to buffer signals from a photodiode when the unit is read onto a sense line, the source follower stage differs from conventional sensor arrays because it uses an N-channel transistor having a P-doped polysilicon gate. In embodiments, other transistors of the array have conventional N-channel transistors with N-doped polysilicon gates.

    Abstract translation: 图像传感器阵列具有平铺单元,其包括源单元级耦合到源单元读取到感测线上时来自光电二极管的信号,源极跟随器级与常规传感器阵列不同,因为它使用具有P 掺杂多晶硅栅极。 在实施例中,阵列的其它晶体管具有具有N掺杂多晶硅栅极的常规N沟道晶体管。

    PROGRAMMABLE CURRENT SOURCE FOR A TIME OF FLIGHT 3D IMAGE SENSOR
    53.
    发明申请
    PROGRAMMABLE CURRENT SOURCE FOR A TIME OF FLIGHT 3D IMAGE SENSOR 有权
    飞行3D图像传感器时间可编程电流源

    公开(公告)号:US20160054447A1

    公开(公告)日:2016-02-25

    申请号:US14464453

    申请日:2014-08-20

    CPC classification number: G01S17/89 G01S7/4863 G01S17/10

    Abstract: A programmable current source for use with a time of flight pixel cell includes a first transistor. A current through the first transistor is responsive to a gate-source voltage of the first transistor. A current control circuit is coupled to the first transistor and coupled to a reference current source to selectively couple a reference current of the reference current source through the first transistor during a sample operation. A sample and hold circuit is coupled to the first transistor to sample a gate-source voltage of the first transistor during the sample operation. The sample and hold circuit is coupled to hold the gate-source voltage during a hold operation after the sample operation substantially equal to the gate-source voltage during the sample operation. A hold current through the first transistor during the hold operation is substantially equal to the reference current.

    Abstract translation: 与飞行时间像素单元一起使用的可编程电流源包括第一晶体管。 通过第一晶体管的电流响应于第一晶体管的栅极 - 源极电压。 电流控制电路耦合到第一晶体管并耦合到参考电流源,以在采样操作期间选择性地将参考电流源的参考电流耦合通过第一晶体管。 采样和保持电路耦合到第一晶体管以在采样操作期间对第一晶体管的栅源电压进行采样。 在采样操作期间,在采样操作期间基本上等于栅极 - 源极电压的保持操作期间,采样和保持电路被耦合以保持栅极 - 源极电压。 在保持操作期间通过第一晶体管的保持电流基本上等于参考电流。

    High dynamic range image sensor read out architecture
    54.
    发明授权
    High dynamic range image sensor read out architecture 有权
    高动态范围图像传感器读出架构

    公开(公告)号:US09118851B2

    公开(公告)日:2015-08-25

    申请号:US14086832

    申请日:2013-11-21

    Inventor: Tiejun Dai Jian Guo

    Abstract: A method of controlling a pixel array includes reading out image data from pixel cells of a row i of the pixel array with second transfer control signals that are coupled to be received by transfer transistors included in the pixels cells of the row of the pixel array that is being read out. Exposure times for pixel cells are independently controlled in other rows of the pixel array that are not being read out with first transfer control signals coupled to be received by transfer transistors included in the pixel cells in the other rows of the pixel array that are not being read out while the image data is read out from the pixel cells of row i of the pixel array.

    Abstract translation: 一种控制像素阵列的方法包括:通过第二传输控制信号从像素阵列的行i的像素单元读出图像数据,该传输控制信号被耦合以由像素阵列行的像素单元中包括的传输晶体管接收, 正在读出。 像素单元的曝光时间在像素阵列的其他行中被独立地控制,其不被第一传输控制信号读出,第一传输控制信号被耦合以由像素阵列的其他行中不存在的像素单元中包含的传输晶体管接收 在从像素阵列的行i的像素单元读出图像数据的同时读出。

    LOW POWER IMAGING SYSTEM WITH SINGLE PHOTON AVALANCHE DIODE PHOTON COUNTERS AND GHOST IMAGE REDUCTION
    55.
    发明申请
    LOW POWER IMAGING SYSTEM WITH SINGLE PHOTON AVALANCHE DIODE PHOTON COUNTERS AND GHOST IMAGE REDUCTION 有权
    具有单光子光电二极管光子计数器和减少图像的低功率成像系统

    公开(公告)号:US20150163429A1

    公开(公告)日:2015-06-11

    申请号:US14100941

    申请日:2013-12-09

    Inventor: Tiejun Dai Rui Wang

    Abstract: An imaging system includes a pixel array including a plurality of pixels. Each one of the pixels includes a single photon avalanche diode (SPAD) coupled to detect photons in response to incident light. A photon counter included in readout circuitry coupled to each pixel to count a number of photons detected by each pixel. The photon counter is coupled to stop counting photons in each pixel when a threshold photon count is reached for each pixel. Control circuitry is coupled to the pixel array to control operation of the pixel array. The control circuitry includes an exposure time counter coupled to count a number of exposure times elapsed before each pixel detects the threshold photon count. Respective exposure time counts and photon counts are combined for each pixel of the pixel array.

    Abstract translation: 成像系统包括包括多个像素的像素阵列。 每个像素包括耦合以响应于入射光检测光子的单个光子雪崩二极管(SPAD)。 包括在耦合到每个像素的读出电路中的光子计数器以对由每个像素检测的多个光子进行计数。 当达到每个像素的阈值光子计数时,光子计数器被耦合以停止计数每个像素中的光子。 控制电路耦合到像素阵列以控制像素阵列的操作。 控制电路包括曝光时间计数器,其被耦合以对每个像素检测到阈值光子计数之前经过的曝光次数进行计数。 对像素阵列的每个像素组合相应的曝光时间计数和光子计数。

    Image Sensor Having NMOS Source Follower With P-Type Doping In Polysilicon Gate
    56.
    发明申请
    Image Sensor Having NMOS Source Follower With P-Type Doping In Polysilicon Gate 有权
    具有NMOS源的图像传感器,在多晶硅栅极中具有P型掺杂

    公开(公告)号:US20150163428A1

    公开(公告)日:2015-06-11

    申请号:US14097779

    申请日:2013-12-05

    Inventor: Tiejun Dai

    Abstract: An image sensor array has a tiling unit comprising a source follower stage coupled to buffer signals from a photodiode when the unit is read onto a sense line, the source follower stage differs from conventional sensor arrays because it uses an N-channel transistor having a P-doped polysilicon gate. In embodiments, other transistors of the array have conventional N-channel transistors with N-doped polysilicon gates.

    Abstract translation: 图像传感器阵列具有平铺单元,其包括源单元级耦合到源单元读取到感测线上时来自光电二极管的信号,源极跟随器级与常规传感器阵列不同,因为它使用具有P 掺杂多晶硅栅极。 在实施例中,阵列的其它晶体管具有具有N掺杂多晶硅栅极的常规N沟道晶体管。

    IMAGE SENSOR WITH FAST INTRA-FRAME FOCUS
    57.
    发明申请
    IMAGE SENSOR WITH FAST INTRA-FRAME FOCUS 有权
    具有快速帧内聚焦的图像传感器

    公开(公告)号:US20140340549A1

    公开(公告)日:2014-11-20

    申请号:US13950970

    申请日:2013-07-25

    CPC classification number: H04N5/335 H04N5/23212

    Abstract: A method of focusing an image sensor includes scanning a first portion of an image frame from an image sensor a first time at a first rate to produce first focus data. A second portion of the image frame from the image sensor is scanned at a second rate to read image data from the second portion. The first rate is greater than the second rate. The first portion of the image frame is scanned a second time at the first rate to produce second focus data. The first focus data and the second focus data are compared, and the focus of a lens is adjusted in response to the comparison of the first focus data and the second focus data.

    Abstract translation: 聚焦图像传感器的方法包括以第一速率首先从图像传感器扫描图像帧的第一部分以产生第一焦点数据。 以第二速率扫描来自图像传感器的图像帧的第二部分,以从第二部分读取图像数据。 第一个比率大于第二个比率。 以第一速率第二次扫描图像帧的第一部分以产生第二焦点数据。 比较第一焦点数据和第二焦点数据,并且响应于第一焦点数据和第二焦点数据的比较来调整透镜的焦点。

    ACQUIRING GLOBAL SHUTTER-TYPE VIDEO IMAGES WITH CMOS PIXEL ARRAY BY STROBING LIGHT DURING VERTICAL BLANKING PERIOD IN OTHERWISE DARK ENVIRONMENT
    58.
    发明申请
    ACQUIRING GLOBAL SHUTTER-TYPE VIDEO IMAGES WITH CMOS PIXEL ARRAY BY STROBING LIGHT DURING VERTICAL BLANKING PERIOD IN OTHERWISE DARK ENVIRONMENT 有权
    采用CMOS像素阵列获取全球快照类型的视频图像,在其他深色环境中的垂直空白期间通过光线照射

    公开(公告)号:US20140078277A1

    公开(公告)日:2014-03-20

    申请号:US13622976

    申请日:2012-09-19

    Abstract: Introduce CMOS pixel array into dark environment and acquiring video image frames. During a first frame, reset each row of pixels sequentially, and one row at a time, and then read each row of pixels sequentially, and one row at a time. During a second frame, reset each row of pixels sequentially, and one row at a time, and then read each row of pixels sequentially, and one row at a time. Control a light source to illuminate the dark environment during at least a portion of a vertical blanking period between the reading of the last row during the first frame and the reading of the first row during the second frame. Control the light source to not illuminate the dark environment: (a) between the reading the first and last rows during the first frame; and (b) between the reading the first and last rows during the second frame.

    Abstract translation: 将CMOS像素阵列引入黑暗环境并获取视频图像帧。 在第一帧期间,顺序地重置每行像素,一次重复一行,然后依次读取每行像素,并一次读取一行。 在第二帧期间,顺序地重置每行像素,并且每次重复一行,然后依次读取每行像素,并一次读取一行。 控制光源以在第一帧期间在最后一行的读取和第二帧期间的第一行的读取期间的垂直消隐周期的至少一部分期间照亮黑暗环境。 控制光源不照亮黑暗环境:(a)在第一帧读取第一行和最后一行; 和(b)在第二帧期间读取第一行和最后一行之间。

    Pixel circuit for high dynamic range image sensor

    公开(公告)号:US12185000B2

    公开(公告)日:2024-12-31

    申请号:US17810966

    申请日:2022-07-06

    Abstract: A pixel circuit includes a first photodiode and a second photodiode. The first and second photodiodes photogenerate charge in response to incident light. A first transfer transistor is coupled to the first photodiode. A first floating diffusion is coupled to the first transfer transistor. A second transfer transistor is coupled to the second photodiode. A second floating diffusion is coupled to the second transfer transistor. A dual floating diffusion transistor is coupled between the first and second floating diffusions. An overflow transistor is coupled to the second photodiode. A capacitor is coupled between a voltage source and the overflow transistor. A capacitor readout transistor is coupled between the capacitor and the second floating diffusion. An anti-blooming transistor coupled between the first photodiode and a power line.

    CAPMID DESIGN IN VRFD FOR HDR STRUCTURE
    60.
    发明公开

    公开(公告)号:US20240357253A1

    公开(公告)日:2024-10-24

    申请号:US18303479

    申请日:2023-04-19

    CPC classification number: H04N25/77 H04N25/78

    Abstract: A pixel circuit includes a photodiode configured to photo generate image charge in response to incident light, a floating diffusion coupled to receive the image charge from the photodiode, a transfer transistor coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion, a reset transistor coupled between a variable voltage source and the floating diffusion, wherein the reset transistor is configured to be switched in response to a reset control signal, and a lateral overflow integration capacitor (LOFIC) coupled between the variable voltage source and the floating diffusion. The variable voltage source is configured to output a high-voltage level during a high conversion gain (HCG) reset signal readout and an HCG image signal readout, and a mid-voltage level during a LOFIC image signal readout and a LOFIC reset signal readout.

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