Abstract:
A pixel cell includes a photodiode disposed within a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. A transfer transistor is disposed within the first semiconductor chip and coupled to the photodiode to transfer the image charge from the photodiode. A bias voltage generation circuit disposed within a second semiconductor chip for generating a bias voltage. The bias voltage generation circuit is coupled to the first semiconductor chip to bias the photodiode with the bias voltage. The bias voltage is negative with respect to a ground voltage of the second semiconductor chip. A floating diffusion is disposed within the second semiconductor chip. The transfer transistor is coupled to transfer the image charge from the photodiode on the first semiconductor chip to the floating diffusion on the second semiconductor chip.
Abstract:
An image sensor array has a tiling unit comprising a source follower stage coupled to buffer signals from a photodiode when the unit is read onto a sense line, the source follower stage differs from conventional sensor arrays because it uses an N-channel transistor having a P-doped polysilicon gate. In embodiments, other transistors of the array have conventional N-channel transistors with N-doped polysilicon gates.
Abstract:
A programmable current source for use with a time of flight pixel cell includes a first transistor. A current through the first transistor is responsive to a gate-source voltage of the first transistor. A current control circuit is coupled to the first transistor and coupled to a reference current source to selectively couple a reference current of the reference current source through the first transistor during a sample operation. A sample and hold circuit is coupled to the first transistor to sample a gate-source voltage of the first transistor during the sample operation. The sample and hold circuit is coupled to hold the gate-source voltage during a hold operation after the sample operation substantially equal to the gate-source voltage during the sample operation. A hold current through the first transistor during the hold operation is substantially equal to the reference current.
Abstract:
A method of controlling a pixel array includes reading out image data from pixel cells of a row i of the pixel array with second transfer control signals that are coupled to be received by transfer transistors included in the pixels cells of the row of the pixel array that is being read out. Exposure times for pixel cells are independently controlled in other rows of the pixel array that are not being read out with first transfer control signals coupled to be received by transfer transistors included in the pixel cells in the other rows of the pixel array that are not being read out while the image data is read out from the pixel cells of row i of the pixel array.
Abstract:
An imaging system includes a pixel array including a plurality of pixels. Each one of the pixels includes a single photon avalanche diode (SPAD) coupled to detect photons in response to incident light. A photon counter included in readout circuitry coupled to each pixel to count a number of photons detected by each pixel. The photon counter is coupled to stop counting photons in each pixel when a threshold photon count is reached for each pixel. Control circuitry is coupled to the pixel array to control operation of the pixel array. The control circuitry includes an exposure time counter coupled to count a number of exposure times elapsed before each pixel detects the threshold photon count. Respective exposure time counts and photon counts are combined for each pixel of the pixel array.
Abstract:
An image sensor array has a tiling unit comprising a source follower stage coupled to buffer signals from a photodiode when the unit is read onto a sense line, the source follower stage differs from conventional sensor arrays because it uses an N-channel transistor having a P-doped polysilicon gate. In embodiments, other transistors of the array have conventional N-channel transistors with N-doped polysilicon gates.
Abstract:
A method of focusing an image sensor includes scanning a first portion of an image frame from an image sensor a first time at a first rate to produce first focus data. A second portion of the image frame from the image sensor is scanned at a second rate to read image data from the second portion. The first rate is greater than the second rate. The first portion of the image frame is scanned a second time at the first rate to produce second focus data. The first focus data and the second focus data are compared, and the focus of a lens is adjusted in response to the comparison of the first focus data and the second focus data.
Abstract:
Introduce CMOS pixel array into dark environment and acquiring video image frames. During a first frame, reset each row of pixels sequentially, and one row at a time, and then read each row of pixels sequentially, and one row at a time. During a second frame, reset each row of pixels sequentially, and one row at a time, and then read each row of pixels sequentially, and one row at a time. Control a light source to illuminate the dark environment during at least a portion of a vertical blanking period between the reading of the last row during the first frame and the reading of the first row during the second frame. Control the light source to not illuminate the dark environment: (a) between the reading the first and last rows during the first frame; and (b) between the reading the first and last rows during the second frame.
Abstract:
A pixel circuit includes a first photodiode and a second photodiode. The first and second photodiodes photogenerate charge in response to incident light. A first transfer transistor is coupled to the first photodiode. A first floating diffusion is coupled to the first transfer transistor. A second transfer transistor is coupled to the second photodiode. A second floating diffusion is coupled to the second transfer transistor. A dual floating diffusion transistor is coupled between the first and second floating diffusions. An overflow transistor is coupled to the second photodiode. A capacitor is coupled between a voltage source and the overflow transistor. A capacitor readout transistor is coupled between the capacitor and the second floating diffusion. An anti-blooming transistor coupled between the first photodiode and a power line.
Abstract:
A pixel circuit includes a photodiode configured to photo generate image charge in response to incident light, a floating diffusion coupled to receive the image charge from the photodiode, a transfer transistor coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion, a reset transistor coupled between a variable voltage source and the floating diffusion, wherein the reset transistor is configured to be switched in response to a reset control signal, and a lateral overflow integration capacitor (LOFIC) coupled between the variable voltage source and the floating diffusion. The variable voltage source is configured to output a high-voltage level during a high conversion gain (HCG) reset signal readout and an HCG image signal readout, and a mid-voltage level during a LOFIC image signal readout and a LOFIC reset signal readout.