Abstract:
Methods and structures for ensuring the highly linear discharge of a capacitor used for slew rate control of a power driving stage from a maximum voltage to a minimum supply voltage, such as ground. A voltage ramp generator uses a single cascoded current source to achieve the linear ramp-down.
Abstract:
A CMOS relaxation oscillator is disclosed employing a pair of capacitors and individual charging means. A noninverting amplifier comprising two cascaded inverters is provided with a transmission gate input circuit that alternately switches the amplifier input between the two capacitors. A pair of switches coupled respectively across the capacitors alternately discharge them. The resulting oscillator has a frequency determined by the capacitor charging periods. Accordingly, the frequency and duty cycle can be predetermined as desired. The circuit can also be made either power supply tunable or power supply independent.
Abstract:
A circuit arrangement for generating a sawtooth-shaped signal for the field deflection in a picture display device with an amplitude which is substantially independent of the field frequency is disclosed. The value of the sawtooth-shaped signal during the occurrence of a sampling pulse is compared with a reference value for generating a control signal controlling the slope of the sawtooth-shaped signal. To eliminate instability in amplitude, which might result from phase jitter of the incoming field synchronizing signal and might cause an interlace error, sampling pulses are applied whose repetition frequency is substantially equal to the nth part of the field frequency, where n is an integer which is larger than 1, preferably a small multiple of 2.
Abstract:
A programmable sweep generator for generating a linear ramp signal of different slopes in a predetermined step sequence is disclosed. The programmable sweep generator comprises a controllable voltage generator, a voltage-to-current converter, and integrator sections. The slopes of the ramp signal may be electronically controlled by switching the controllable voltage generator, voltage-to-current converter and timing capacitors in the integrator section. The use of independent buffer amplifiers, independent control circuits, and current steering devices for each timing capacitor eliminates the need to connect a switching element in series with each timing capacitor, thereby eliminating any error or non-linearity.
Abstract:
In a monolithic integrated RC-oscillator comprising only one external frequency-determining network of a capacitance and a discharge circuit, a charging circuit which can be switched on and off periodically is connected to the network, which charging circuit is switched on and switched off by means of a threshold circuit with two switching thresholds when the voltage across the capacitor of the network reaches the lower and the upper switching threshold, respectively. In order to ensure that the frequency of the generated sawtooth signal is independent of a fixed discharge current, which is subject to spreading, and of the temperature coefficient of this current, the charging current of the charging circuit is controlled by the voltage across a second capacitor, which is charged or discharged with a current (I.sub.1) when the frequency-determining capacitance is discharged and which is discharged or charged with a second current when said frequency-determining capacitor is charged.
Abstract:
A horizontal oscillator for a television receiver includes an on chip nitride capacitor. The circuit includes a reference current amplifier which generates a low temperature coefficient reference current. By varying the gain of a current mirror circuit, the reference current is split to produce a small charge/discharge current. A resistive bias chain and first and second capacitors are employed to fix the upper and lower peak voltages of the oscillator output ramp signal.
Abstract:
In an improved speech compressor which provides frequency transformation by passing speech signals through an analog shift register and controlling the shift rate of the register with a varying period, the control of the sample period and output blanking is improved by automatically initiating reset as soon as a zero crossing of the signal is detected within the enable blank interval. Thus, discard of information in the line and refilling of the line with the next initial portion of the sample signal will occur as soon as the detected zero crossing within the enable period blanks the output and the effective blanked period will thereby be shortened to the extent that a zero crossing is detected prior to the regular termination point of the ramp controlled voltage.
Abstract:
In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin on the chip, and where the pin is adapted to be coupled to an external resistor, where the external resistor is external to the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first switch, and a second capacitor coupled to a second switch. The oscillator circuit includes leakage circuitry coupled to the current mirror, where the leakage circuitry is configured to draw a current from the current mirror proportional to a leakage current flowing through the external resistor from circuitry internal to the chip.