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公开(公告)号:US11693993B2
公开(公告)日:2023-07-04
申请号:US17181123
申请日:2021-02-22
Applicant: Texas Instruments Incorporated
Inventor: Veeramanikandan Raju , Jonathan William Nafziger
CPC classification number: G06F21/85 , G06F11/3058 , G06F21/606 , G06F21/79
Abstract: A system including a bus, a processor coupled to the bus, a non-volatile memory coupled to the bus, circuitry for providing a detected condition, and a secure controller. The secure controller is coupled to the circuitry for providing a detected condition and to selectively enable communication of information between the non-volatile memory and the bus in response to the detected condition.
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公开(公告)号:US20230185972A1
公开(公告)日:2023-06-15
申请号:US18060969
申请日:2022-12-02
Applicant: MONTAGE TECHNOLOGY CO., LTD.
Inventor: Yi LI
IPC: G06F21/85
CPC classification number: G06F21/85 , G06F2221/2141
Abstract: The present application relates to a control system with a security management device. The control system comprises: a bus; one or more electronic devices coupled to the bus to transmit data with the bus through respective communication protocols; one or more security monitoring managers each coupled between an electronic device and the bus, wherein each of the security monitoring managers is configured to snoop data transmitted between the electronic device and the bus based on a predetermined transmission protocol, determine whether the data conforms to a predetermined authority management rule to generate a determination result, and selectively allow the data to be transmitted to the bus or the electronic device according to the determination result, and wherein the predetermined transmission protocol correspond to the communication protocol of the electronic device; and a central security manager coupled to the security monitoring managers, wherein the central security manager is configured to configure the predetermined transmission protocol and the predetermined authority management rule used by each of the security monitoring managers.
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公开(公告)号:US20230177176A1
公开(公告)日:2023-06-08
申请号:US18074225
申请日:2022-12-02
Applicant: Rambus Inc.
Inventor: Evan Lawrence Erickson , Taeksang Song
CPC classification number: G06F21/602 , G06F21/85 , G06F21/54
Abstract: A multi-processor device is disclosed. The multi-processor device includes memory interface circuitry to access external memory. A primary processor is selectively coupled to the interface circuitry. A secure processor enables/disables access to the memory interface circuitry by the primary processor based on an operating mode of the multi-processor IC chip.
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44.
公开(公告)号:US11669646B2
公开(公告)日:2023-06-06
申请号:US17499934
申请日:2021-10-13
Applicant: HIGH SEC LABS LTD.
Inventor: Aviv Soffer , David Hirshberg
CPC classification number: G06F21/85 , G06F13/385 , G06F21/31 , G06F21/552 , G06F21/606 , G06F21/83 , G06F21/84 , G06F2221/031 , G06F2221/032 , G06F2221/2141
Abstract: A mediator and a method for securing a mediator for coupling between one or more hosts and one or more consoles comprising one or more peripheral devices. The mediator is having at least three stages: (i) a security setup stage; (ii) a neutralization stage; and (iii) a normal operation stage. In the normal operation stage, the mediator couples between at least one of the one or more peripheral devices and at least one of the one or more peripheral devices. In the neutralization stage the mediator disable coupling between at least one of the one or more peripheral devices and at least one of the one or more peripheral devices. The securing method starts with the security setup stage after at least one of (a) a power-up; (b) a reset; (c) a device connection; and (d) an unlock command. Upon entering the security setup stage, the method performs the following: (1) reading the device information of the one or more peripheral devices; (2) if the mediator is in Unlock state, waiting for a locking command and upon locking command arrival, register the information of the one or more peripheral devices to non-volatile memory, and proceed to normal operation stage, (3) if the mediator is in Lock state, compare the registered information of the one or more peripheral devices with the information read previously, and upon a match proceed to normal operation stage and upon a miss-match proceed to neutralization stage. The lock and unlock commands are provided from an authorized user or an administrator.
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公开(公告)号:US11665021B2
公开(公告)日:2023-05-30
申请号:US17009767
申请日:2020-09-01
Applicant: NXP B.V.
Inventor: Rolf van de Burgt , Franciscus Johannes Klösters
CPC classification number: H04L12/4135 , H04B1/40 , H04L7/033 , H04L12/40163 , G06F1/14 , G06F21/85 , H04L2012/40215 , H04L2012/40273
Abstract: A transceiver for sending and receiving data from a controller area network (CAN) bus is disclosed. The transceiver includes a microcontroller port, a transmitter and a receiver, wherein the transceiver is configured to determine bit timings from a data frame received by the receiver. The transceiver is further configured to detect attempts to introduce a signal glitch in a predetermined portion of the data frame and upon detection of the signal glitch, the transceiver is configured to invalidate the data frame on a transmission line and/or disable the transmitter for a predetermined period.
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公开(公告)号:US20230163954A1
公开(公告)日:2023-05-25
申请号:US17456032
申请日:2021-11-22
Applicant: LENOVO (SINGAPORE) PTE. LTD
Inventor: Scott Li , Igor Stolbikov , Rod D. Waltermann , Joshua N. Novak
CPC classification number: H04L9/0825 , H04L9/0894 , H04L9/0861 , H04L9/3242 , G06F21/85
Abstract: An electronic device is provided that includes a memory storing program instructions, and one or more processors. The one or more processors, when executing the program instructions, are configured to generate an agent public key, and generate a key font based on the agent public key. The one or more processors are also configured to communicate the key font to an operating system, and obtain a key message based on the key font from an application. The one or more processors are also configured to respond to the key message on a bus based on the key message.
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公开(公告)号:US11651112B2
公开(公告)日:2023-05-16
申请号:US17712350
申请日:2022-04-04
Applicant: Intel Corporation
Inventor: Alpa Trivedi , Carlos Rozas
IPC: H04L9/08 , G06F9/30 , G06F15/177 , G06F11/07 , G06F11/30 , H04L9/00 , G06F21/30 , G06F21/85 , G06F30/398 , G06N3/04 , G06F9/50 , G06F15/78 , H04L9/40 , G06F30/331 , G06F9/38 , G06F119/12 , G06F21/76 , G06N3/08 , G06F111/04 , G06F30/31 , G06F21/53 , G06F21/57 , G06F21/73 , G06F21/74 , G06N20/00 , G06F21/71 , G06F21/44
CPC classification number: G06F21/85 , G06F9/30101 , G06F9/3877 , G06F9/505 , G06F11/0709 , G06F11/0751 , G06F11/0754 , G06F11/0793 , G06F11/3058 , G06F15/177 , G06F15/7825 , G06F15/7867 , G06F30/331 , G06F30/398 , G06N3/04 , H04L9/0877 , H04L63/0442 , H04L63/12 , H04L63/20 , G06F11/0772 , G06F11/3051 , G06F21/30 , G06F21/44 , G06F21/53 , G06F21/57 , G06F21/575 , G06F21/71 , G06F21/73 , G06F21/74 , G06F21/76 , G06F30/31 , G06F2111/04 , G06F2119/12 , G06F2221/034 , G06N3/08 , G06N20/00 , H04L9/008 , H04L9/0841
Abstract: An apparatus to facilitate enabling stateless accelerator designs shared across mutually-distrustful tenants is disclosed. The apparatus includes a fully-homomorphic encryption (FHE)-capable circuitry to establish a secure session with a trusted environment executing on a host device communicably coupled to the apparatus; generate, as part of establishing the secure session, per-tenant FHE keys for each tenant utilizing the FHE-capable circuitry, the per-tenant FHE keys utilized to encrypt tenant data provided to an FHE-capable compute kernel of the FHE-capable circuitry; process tenant data that is in an FHE-encrypted format encrypted with a per-tenant FHE key of the per-tenant FHE keys; and store the tenant data that is in the FHE-encrypted format encrypted with the per-tenant FHE key of the per-tenant FHE keys.
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公开(公告)号:US11645430B2
公开(公告)日:2023-05-09
申请号:US17194365
申请日:2021-03-08
Inventor: Ofer Hofman
CPC classification number: G06F21/85 , G06F21/54 , G06F21/554
Abstract: Communication buses enable devices to communicate and exchange information and control signals. There is a growing concern over the security of such types of buses. Since any device can transmit any message, and device on the bus which can be compromised poses a threat for the bus. Described is a system to authenticate the source of messages from various devices on a communication bus.
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公开(公告)号:US20190220626A1
公开(公告)日:2019-07-18
申请号:US15873670
申请日:2018-01-17
Applicant: CrowdStrike, Inc.
Inventor: Aaron LeMasters , Ion-Alexandru Ionescu
CPC classification number: G06F21/82 , G06F9/4415 , G06F13/20 , G06F13/385 , G06F13/387 , G06F13/4063 , G06F21/554 , G06F21/56 , G06F21/572 , G06F21/71 , G06F21/85 , G06F2221/2141
Abstract: A plug-and-play (PnP) driver associated with a security agent is described herein. The PnP driver attaches to device stacks of enumerated bus devices of a computing device as upper-device or lower-device filters based on the device classes of the enumerated bus devices. For example, the PnP driver may attach to the device stack of a hub or controller device as an upper-device filter and to device stacks of other devices as lower-device filters. Either while attaching or after attachment, the PnP driver may take action to alter, limit, or otherwise block functionality of an enumerated bus device. The PnP driver may also perform a system inventory of enumerated bus devices connected to the computing device and create fingerprints for one or more of the computing devices. Additionally, the PnP driver may create and remove control device objects (CDOs) to enable communication with user-mode processes or threads.
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公开(公告)号:US20190220601A1
公开(公告)日:2019-07-18
申请号:US16362218
申请日:2019-03-22
Applicant: Intel Corporation
Inventor: Kapil Sood , Ioannis T. Schoinas , Yu-Yuan Chen , Raghunandan Makaram , David J. Harriman , Baiju Patel , Ronald Perez , Matthew E. Hoekstra , Reshma Lal
CPC classification number: G06F21/57 , G06F9/505 , G06F21/72 , G06F21/85 , G06F2221/034
Abstract: In one embodiment, an apparatus comprises a processor to: receive a request to configure a secure execution environment for a first workload; configure a first set of secure execution enclaves for execution of the first workload, wherein the first set of secure execution enclaves is configured on a first set of processing resources, wherein the first set of processing resources comprises one or more central processing units and one or more accelerators; configure a first set of secure datapaths for communication among the first set of secure execution enclaves during execution of the first workload, wherein the first set of secure datapaths is configured over a first set of interconnect resources; configure the secure execution environment for the first workload, wherein the secure execution environment comprises the first set of secure execution enclaves and the first set of secure datapaths.
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