公开(公告)号：US20190005375A1

公开(公告)日：2019-01-03

申请号：US15730316

申请日：2017-10-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mihir Narendra Mody ,  Veeramanikandan Raju ,  Chaitanya Ghone ,  Deepak Poddar

IPC: G06N3/04 ,  H04L29/06 ,  G06N3/08

Abstract: A CNN based-signal processing includes receiving of an encrypted output from a first layer of a multi-layer CNN data. The received encrypted output is subsequently decrypted to form a decrypted input to a second layer of the multi-layer CNN data. A convolution of the decrypted input with a corresponding decrypted weight may generate a second layer output, which may be encrypted and used as an encrypted input to a third layer of the multi-layer CNN data.

公开(公告)号：US20170132240A1

公开(公告)日：2017-05-11

申请号：US15413048

申请日：2017-01-23

Applicant: Texas Instruments Incorporated

Inventor： Madan Srinivas ,  Veeramanikandan Raju ,  Keshava Munegowda

IPC: G06F17/30

CPC classification number: G06F17/30109 ,  G06F17/30091 ,  G06F17/30094 ,  G06F17/30203

Abstract: Disclosed embodiments relate to storing and accessing files. In an embodiment, a method includes writing a file to a writing a file to a storage device having a file system having a file allocation table (FAT). Writing the file includes allocating a plurality of clusters of the file system to the file, wherein at least a portion of the allocated clusters is contiguous. The FAT includes a plurality of cluster addresses corresponding to the allocated clusters. A signature value is stored in a cluster address corresponding to a first cluster of the contiguous clusters to indicate the presence of the contiguous clusters. In each of a set of consecutive cluster addresses succeeding the cluster address corresponding to the first cluster, a value that partially represents the number of the contiguous clusters is stored. The number of contiguous clusters is determinable by combining the values stored in the consecutive cluster addresses.

公开(公告)号：US20160344997A1

公开(公告)日：2016-11-24

申请号：US15226430

申请日：2016-08-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Veeramanikandan Raju ,  Gregory R. Hewes

IPC: H04N13/00

CPC classification number: H04N13/133 ,  H04N13/128 ,  H04N13/144

Abstract: The present invention is drawn to a device for use with first stereoscopic data, second stereoscopic data and a display device. The device includes an input portion, a convergence data detecting portion, a convergence plane portion, a comparing portion and a modification portion. The input portion can receive the first stereoscopic data and the second stereoscopic data. The convergence data detecting portion can detect first convergence data within the first stereoscopic data and can detect second convergence data within the second stereoscopic data. The convergence plane portion can determine a first convergence plane based on the first convergence data and can determine a second convergence plane based on the second convergence data. The comparing portion can compare the first convergence plane and the second convergence plane and can generate a convergence plane comparison. The modification portion can modify the first convergence data based on the convergence plane comparison.

Abstract translation: 本发明涉及一种用于第一立体数据，第二立体数据和显示装置的装置。 该装置包括输入部分，会聚数据检测部分，会聚平面部分，比较部分和修改部分。 输入部分可以接收第一立体数据和第二立体数据。 会聚数据检测部分可以检测第一立体数据内的第一会聚数据，并且可以检测第二立体数据内的第二会聚数据。 会聚平面部分可以基于第一会聚数据确定第一会聚平面，并且可以基于第二会聚数据确定第二会聚平面。 比较部分可以比较第一会聚平面和第二会聚平面，并可以生成会聚平面比较。 修改部分可以基于会聚平面比较来修改第一收敛数据。

公开(公告)号：US20150134711A1

公开(公告)日：2015-05-14

申请号：US14075757

申请日：2013-11-08

Applicant: Texas Instruments Incorporated

Inventor： Madan Srinivas ,  Veeramanikandan Raju ,  Keshava Munegowda

IPC: G06F17/30

CPC classification number: G06F17/30109 ,  G06F17/30091 ,  G06F17/30094 ,  G06F17/30203

Abstract: Several systems and methods for accessing files stored in a storage device are disclosed. In an embodiment, the method includes accessing a file allocation table (FAT) in a computer file system associated with the storage device. The FAT includes a plurality of cluster addresses corresponding to a plurality of clusters allocated to a file stored in the storage device. A cluster address is read to identify a location of a next cluster. One or more bits in the cluster address are read to determine a presence of a signature value indicating allocation of a set of contiguous clusters from among the plurality of clusters. A number of contiguous clusters is computed based on a pre-determined number of consecutive cluster addresses succeeding the cluster address if the signature value is present. The set of contiguous clusters are read from the storage device based on the computed number of contiguous clusters.

Abstract translation: 公开了用于访问存储在存储设备中的文件的几种系统和方法。 在一个实施例中，该方法包括访问与存储设备相关联的计算机文件系统中的文件分配表（FAT）。 FAT包括与分配给存储在存储装置中的文件的多个集群相对应的多个集群地址。 读取集群地址以标识下一个集群的位置。 读取集群地址中的一个或多个位以确定表示从多个集群中分配一组连续集群的签名值的存在。 如果签名值存在，则基于簇聚合地址后续的连续簇地址的预定数量来计算多个连续簇。 基于所计算的连续簇的数量，从存储设备读取连续簇的集合。

公开(公告)号：US20130232107A1

公开(公告)日：2013-09-05

申请号：US13870344

申请日：2013-04-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Keshava Munegowda ,  Madan Srinivas ,  Rohit Joshi ,  Veeramanikandan Raju

IPC: G06F17/30

CPC classification number: G06F17/30997 ,  G06F11/1435 ,  G06F11/1441 ,  G06F11/1471 ,  G06F17/3007 ,  G06F17/30368 ,  G06F17/30598 ,  G06F17/30864

Abstract: A computer device (2010) with a file system having clusters and meta data. The computer device (2010) includes a processor (1030) and a storage (1025) coupled to the processor and having physical representations of instructions so that the processor is operable to reserve (230) at least one of the clusters and to create a log record when meta data for the file system is to be updated by a write (240) of such meta data beforehand to such a reserved cluster, and then set (250) at least one state entry to substantially represent readiness to write the meta data to the file system.

公开(公告)号：US20250111059A1

公开(公告)日：2025-04-03

申请号：US18375372

申请日：2023-09-29

Applicant: Texas Instruments Incorporated

Inventor： Veeramanikandan Raju ,  Mihir Narendra Mody ,  Tanu Hari Dixit

IPC: G06F21/60 ,  G06F7/58 ,  G06F11/07 ,  G06F21/72

Abstract: An example apparatus includes: interface circuitry; and programmable circuitry configured to: obtain a set of processor instructions; select a first subset of processor instructions from the set; encrypt the first subset of processor instructions; select a second subset of processor instructions from the set; compute a plurality of message authentication codes (MACs) corresponding to the second subset of processor instructions; cause the interface circuitry to write the set of processor instructions to an external memory; and cause the interface circuitry to write a description of the first subset of processor instructions, a description of the second subset of processor instructions, and the plurality of MACs to the external memory.

公开(公告)号：US20250047471A1

公开(公告)日：2025-02-06

申请号：US18362695

申请日：2023-07-31

Applicant: Texas Instruments Incorporated

Inventor： Veeramanikandan Raju ,  Anand Kumar G

IPC: H04L9/06

Abstract: A network-communicating device with a signal input adapted to receive a sensor-derived signal; an analog-to-digital converter (ADC) having an input coupled to the signal input and an output; a data scrambling circuit having an input coupled to the output of the ADC and an output; a watermark insertion circuit having an input coupled to the output of the data scrambling circuit and an output; and a signal output coupled to the output of the watermark insertion circuit.

公开(公告)号：US12181974B2

公开(公告)日：2024-12-31

申请号：US17563398

申请日：2021-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Veeramanikandan Raju ,  Sudhakar Surendran ,  Anand Kumar G

IPC: G06F11/14 ,  G06F11/07 ,  G06F11/22 ,  G06F11/26 ,  G06F11/30 ,  G06F11/34 ,  G06F11/36 ,  G06F13/16 ,  G06F13/40 ,  G06F21/10 ,  G06F21/60

Abstract: This disclosure relates to an electronic device. The electronic device includes a non-transitory storage device, one or more peripherals, wherein the one or more peripherals are disabled, a processor configured to transmit a request to enable a peripheral of the one or more peripherals, and a power reset manager module. The power reset manager module is configured to receive the request to enable the peripheral. The power reset manager module includes a first memory configured to store, in response to the received request, an indication that peripheral was enabled. The processor is further configured to copy contents of the first memory to the non-transitory storage device and output the indication that the peripheral was enabled as a part of an update procedure.

公开(公告)号：US12141337B2

公开(公告)日：2024-11-12

申请号：US18326176

申请日：2023-05-31

Applicant: Texas Instruments Incorporated

Inventor： Veeramanikandan Raju

IPC: G06F21/88 ,  G06F21/31 ,  G06F21/57 ,  H04L61/103 ,  H04L101/622 ,  H04W4/02 ,  H04W4/70 ,  H04W12/126

Abstract: An end-user computing device can include a theft detector that maintains a registered host device list containing identifiers of at least one registered host device. The theft detector can have root access to operations of the end-user device and the theft detector can provides a secure reboot request in response to detecting a possible theft condition. The end-user computing device can also include a boot loader that executes a secure reboot of the end-user device in response to a secure reboot request from the theft detector. The secure reboot of the end-user device resets the end-user device to prevent access to the end-user device.

公开(公告)号：US20240233787A1

公开(公告)日：2024-07-11

申请号：US18610993

申请日：2024-03-20

Applicant: Texas Instruments Incorporated

Inventor： Veeramanikandan Raju ,  Anand Kumar G

IPC: G11C7/10 ,  G11C5/14 ,  G11C7/22

CPC classification number: G11C7/109 ,  G11C5/14 ,  G11C7/1039 ,  G11C7/1063 ,  G11C7/222

Abstract: A communications circuit with an input port, a switching circuit coupled to the input port, and a first and second memory coupled to the switching circuit. The communications circuit also includes controlling circuitry adapted to operate the switching circuit to couple data received at the input port to the first memory while the second memory is disabled from power and to couple data received at the input port to the second memory once the first memory is filled with valid data.