知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

49 records (took 0.02 seconds)

    Filter system including resonator
    42.
    发明授权
    Filter system including resonator 有权

    公开(公告)号：US11050410B2

    公开(公告)日：2021-06-29

    申请号：US16597069

    申请日：2019-10-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungchan Kang ,  Cheheung Kim ,  Sangha Park ,  Yongseop Yoon ,  Choongho Rhee

    IPC: H03H9/54 ,  G01H11/08 ,  H03H9/24 ,  H04R17/02 ,  H04R17/10 ,  H03H9/13 ,  H04R25/00

    Abstract: A filter system includes a first resonator having a first resonant frequency, and a second resonator having a second resonant frequency different from the first resonant frequency, and electrically connected to the first resonator. A first response characteristic of the first resonator and a second response characteristic of the second resonator with respect to a frequency include a first section in which a first phase of the first resonator is equal to a second phase of the second resonator, and a second section in which the first phase is different from the second phase by 180 degrees. A first electrode of the first resonator is reversely connected to a second electrode of the second resonator.

    PLASMA DICING METHOD
    44.
    发明申请
    PLASMA DICING METHOD 有权

    公开(公告)号：US20210013043A1

    公开(公告)日：2021-01-14

    申请号：US16696513

    申请日：2019-11-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Choongho Rhee ,  Sungchan Kang ,  Hyunwook Kang ,  Cheheung Kim ,  Yongseop Yoon ,  Jaehyung Jang ,  Hyeokki Hong

    IPC: H01L21/3065 ,  H01L21/56 ,  H01L21/02 ,  H01L21/683

    Abstract: Provided is a plasma dicing method. The plasma dicing method includes: performing plasma etching on a first surface of a substrate exposed between a plurality of membrane structures; forming a passivation layer on a semiconductor wafer to cover the plurality of membrane structures and at least one trench; performing plasma etching on a second surface of the substrate such that a through hole exposing a portion of the plurality of membrane structures and a dicing lane connected to the trench and having a width less than a width of the through hole are formed at the substrate; and removing the passivation layer and singulating the semiconductor wafer into a plurality of devices including a membrane partially exposed by the through hole.

    INTEGRATED CIRCUIT, AND METHOD AND SYSTEM FOR PROVIDING POWER TO INTEGRATED CIRCUIT
    48.
    发明申请
    INTEGRATED CIRCUIT, AND METHOD AND SYSTEM FOR PROVIDING POWER TO INTEGRATED CIRCUIT 审中-公开

    公开(公告)号：US20190033904A1

    公开(公告)日：2019-01-31

    申请号：US15869605

    申请日：2018-01-12

    Applicant: Samsung Electronics Co, Ltd.

    Inventor： Hyeokki HONG ,  Cheheung Kim ,  Sungchan Kang ,  Jinmyoung Kim ,  Sangha Park ,  Yongseop Yoon ,  Choongho Rhee

    IPC: G05F3/08

    CPC classification number: G05F3/08 ,  H03K19/0019

    Abstract: An integrated circuit includes a highest class core circuit that has a positive power supply terminal connected to a positive power supply terminal of an external power source, and is configured to receive a first supply voltage which is at least a portion of a an input supply voltage that is provided from the external power source based on an operation throughput; and a lowest class core circuit that has a positive power supply terminal connected to a negative power supply terminal of an adjacent upper class core circuit, has a negative power supply terminal connected to a negative power supply terminal of the external power source, and is configured to receive a second supply voltage which is at least a portion of a part of the input supply voltage that excludes the first supply voltage.

Patent Agency Ranking