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    Analog-to-digital converter having a comparison signal generation unit and image sensor including the same
    42.
    发明授权
    Analog-to-digital converter having a comparison signal generation unit and image sensor including the same 有权
    具有比较信号生成单元和包含该比较信号生成单元的图像传感器的模数转换器

    公开(公告)号：US08547461B2

    公开(公告)日：2013-10-01

    申请号：US13240670

    申请日：2011-09-22

    Applicant: Wun-Ki Jung ,  Seung-Hyun Lim ,  Dong-Hun Lee ,  Kwi-Sung Yoo ,  Min-Ho Kwon ,  Chi-Ho Hwang

    Inventor： Wun-Ki Jung ,  Seung-Hyun Lim ,  Dong-Hun Lee ,  Kwi-Sung Yoo ,  Min-Ho Kwon ,  Chi-Ho Hwang

    IPC: H04N3/14 ,  H03M1/12

    CPC classification number: H04N5/378 ,  H03M1/162 ,  H03M1/56 ,  H04N5/3575 ,  H04N5/374

    Abstract: An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.

    Abstract translation: 模数转换器包括比较信号生成单元和控制单元。 比较信号生成单元通过在第一比较模式中基于开关控制信号比较输入信号与所选择的参考信号，并且通过基于开关控制将差分电压与斜坡信号进行比较来确定比较信号的逻辑电平 信号在第二比较模式。 基于输入信号和所选择的参考信号产生差分电压，使得差分电压的电平低于与第二比较模式中所选参考信号的电压电平相对应的精细电压电平。 控制单元基于比较信号和模式选择信号产生开关控制信号。

    Inverter driver and lamp driver thereof
    44.
    发明授权
    Inverter driver and lamp driver thereof 失效
    变频器驱动器及其驱动器

    公开(公告)号：US08184416B2

    公开(公告)日：2012-05-22

    申请号：US12220559

    申请日：2008-07-25

    Applicant: Jae-Soon Choi ,  Dong-Hun Lee

    Inventor： Jae-Soon Choi ,  Dong-Hun Lee

    IPC: H02H3/20 ,  H02H9/04

    CPC classification number: H05B41/282

    Abstract: An inverter driver controls an inverter that supplies driving voltages to a plurality of discharge lamps. The inverter driver senses the abnormal operation of the plurality of discharge lamps based on a plurality of first feedback voltages corresponding to the plurality of driving voltages supplied to the discharge lamps and a plurality of second feedback voltages corresponding to the current flowing through the plurality of discharge lamps. The inverter driver is formed in a single integrated circuit.

    Abstract translation: 逆变器驱动器控制向多个放电灯提供驱动电压的逆变器。 逆变器驱动器基于对应于提供给放电灯的多个驱动电压的多个第一反馈电压和与流过多个放电的电流对应的多个第二反馈电压来感测多个放电灯的异常操作 灯具 逆变器驱动器形成在单个集成电路中。

    OPTICAL DEVICES AND METHODS OF FABRICATING THE SAME
    46.
    发明申请
    OPTICAL DEVICES AND METHODS OF FABRICATING THE SAME 有权
    光学装置及其制造方法

    公开(公告)号：US20110085760A1

    公开(公告)日：2011-04-14

    申请号：US12704512

    申请日：2010-02-11

    Applicant: Young-Tak HAN ,  Sang Ho Park ,  Dong-Hun Lee ,  Jang Uk Shin ,  Sang-Pil Han ,  Yongsoon Baek

    Inventor： Young-Tak HAN ,  Sang Ho Park ,  Dong-Hun Lee ,  Jang Uk Shin ,  Sang-Pil Han ,  Yongsoon Baek

    IPC: G02B6/12 ,  H01L21/50

    CPC classification number: G02B6/136 ,  G02B6/423 ,  G02B6/4231 ,  G02B2006/12176 ,  H01L24/11 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/00

    Abstract: Provided is an optical device. The optical device includes a substrate having a waveguide region and a mounting region, a planar lightwave circuit (PLC) waveguide including a lower-clad layer and an upper-clad layer on the waveguide region of the substrate and a platform core between the lower-clad layer and the upper-clad layer, a terrace defined by etching the lower-clad layer on the mounting region of the substrate, the terrace including an interlocking part, an optical active chip mounted on the mounting region of the substrate, the optical active chip including a chip core therein, and a chip alignment mark disposed on a mounting surface of the optical active chip. The optical active chip is aligned by interlocking between the interlocking part of the terrace and the chip alignment mark of the optical active chip and mounted on the mounting region.

    Abstract translation: 提供了一种光学装置。 光学装置包括具有波导区域和安装区域的基板，在基板的波导区域上包括下覆盖层和上覆盖层的平面光波导路（PLC）波导和位于基板的波导区域之间的平台铁心， 包覆层和上包层，通过蚀刻衬底的安装区域上的下包覆层限定的平台，所述露台包括互锁部分，安装在衬底的安装区域上的光学有源芯片，光学活动 芯片，其中包括芯片芯片，以及设置在光学有源芯片的安装表面上的芯片对准标记。 光学有源芯片通过在平台的互锁部分和光学有源芯片的芯片对准标记之间的互锁对准并且安装在安装区域上。

    Method of correcting a design pattern for an integrated circuit and an apparatus for performing the same
    47.
    发明授权
    Method of correcting a design pattern for an integrated circuit and an apparatus for performing the same 有权
    校正集成电路的设计图案的方法及其执行装置

    公开(公告)号：US07840917B2

    公开(公告)日：2010-11-23

    申请号：US12080381

    申请日：2008-04-02

    Applicant: Choel-Hwyi Bae ,  Jin-Hee Kim ,  You-Seung Jin ,  Dong-Hun Lee

    Inventor： Choel-Hwyi Bae ,  Jin-Hee Kim ,  You-Seung Jin ,  Dong-Hun Lee

    IPC: G06F17/50

    CPC classification number: G03F1/72

    Abstract: In an apparatus and method for automatically correcting a design pattern in view of different process defects, defect characteristic functions that indicate frequencies of each process defect independent from one another are generated, and a normalization factor that indicates relationships between the defect characteristic functions is determined. A general defect characteristic function indicating a frequency of general defects is generated using the defect characteristic functions and the normalization factor. The general defect causes the same process failure as caused by each of the process defects. The design pattern is modified using the general defect characteristic function in such a manner that the frequency of the general defects is minimized when at least one portion of the design pattern corresponding to the model pattern is transcribed on the substrate. Accordingly, the whole design pattern may be automatically corrected based on the general defect characteristic function.

    Abstract translation: 在用于根据不同的工艺缺陷自动校正设计图案的装置和方法中，生成指示彼此独立的各过程缺陷的频率的缺陷特征函数，并且确定指示缺陷特征函数之间的关系的归一化因子。 使用缺陷特征函数和归一化因子生成表示一般缺陷频率的一般缺陷特征函数。 一般缺陷导致由每个工艺缺陷引起的相同的过程故障。 使用一般缺陷特征函数修改设计图案，使得当在衬底上转录对应于模型图案的设计图案的至少一部分时，一般缺陷的频率最小化。 因此，可以基于一般缺陷特征函数自动校正整个设计图案。

    Overlay mark for measuring and correcting alignment errors
    49.
    发明授权
    Overlay mark for measuring and correcting alignment errors 有权
    用于测量和校正对准误差的叠加标记

    公开(公告)号：US07288848B2

    公开(公告)日：2007-10-30

    申请号：US10997441

    申请日：2004-11-23

    Applicant: Dong-Hun Lee ,  Jong-Hyon Ahn ,  Do-Yul Yoo ,  Sung-Gun Kang

    Inventor： Dong-Hun Lee ,  Jong-Hyon Ahn ,  Do-Yul Yoo ,  Sung-Gun Kang

    IPC: H01L23/544

    CPC classification number: G03F7/70633 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54453 ,  H01L2223/54466 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An overlay mark includes at least one hole array formed on a semiconductor substrate and at least one linear trench adjacent to the hole array. The hole array may be formed adjacent to the linear trench along a predetermined direction. When alignment errors among patterns formed at predetermined portion of the semiconductor substrate are detected, the overlay mark may provide a contrast of light with a desired width and a high level so that alignment errors of patterns formed on the semiconductor substrate may be accurately detected and corrected using the overlay mark.

    Abstract translation: 覆盖标记包括形成在半导体衬底上的至少一个孔阵列和与孔阵列相邻的至少一个线性沟槽。 孔阵列可以沿着预定方向形成为与线性沟槽相邻。 当检测到在半导体衬底的预定部分形成的图形之间的对准误差时，重叠标记可以提供具有所需宽度和高电平的光的对比度，从而可以精确地检测和校正形成在半导体衬底上的图案的对准误差 使用重叠标记。

    Analog-to-digital converter for image sensor
    50.
    发明授权
    Analog-to-digital converter for image sensor 失效
    用于图像传感器的模数转换器

    公开(公告)号：US06943719B2

    公开(公告)日：2005-09-13

    申请号：US10644893

    申请日：2003-08-21

    Applicant: Young-Hwan Yun ,  Dong-Hun Lee

    Inventor： Young-Hwan Yun ,  Dong-Hun Lee

    IPC: H03M1/12 ,  H03M1/00 ,  H03M1/56

    CPC classification number: H03M1/002 ,  H03M1/123 ,  H03M1/56

    Abstract: A signal processing circuit outputs a digital word responsive to incident light, and includes an analog integrated circuit having a first input terminal receiving a first analog signal during a first active period of a first switching signal and a second input terminal receiving a time varying reference signal; an inverter circuit inverting and amplifying an output of the analog integrated circuit responsive to an activated enable signal; and an output circuit generating the digital word. During a second active period of the first switching signal, the first input terminal is coupled to a data line for receiving a second analog signal corresponding to image charges of an image input element. The enable signal is deactivated between end points of the first and second active periods of the first switching signal.

    Abstract translation: 信号处理电路响应于入射光输出数字字，并且包括模拟集成电路，其具有在第一开关信号的第一有效周期期间接收第一模拟信号的第一输入端和接收时变参考信号的第二输入端 ; 反相器电路响应于激活的使能信号来反相和放大模拟集成电路的输出; 以及产生数字字的输出电路。 在第一切换信号的第二有效周期期间，第一输入端耦合到数据线，用于接收对应于图像输入元件的图像电荷的第二模拟信号。 使能信号在第一开关信号的第一和第二有效周期的端点之间被去激活。

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