公开(公告)号：US11731656B2

公开(公告)日：2023-08-22

申请号：US17972375

申请日：2022-10-24

Applicant: DEEPX CO., LTD.

Inventor： Lok Won Kim

IPC: B60W60/00 ,  G05B13/02 ,  B60W50/00 ,  G06F9/30 ,  G06T1/20 ,  G06N3/02 ,  G06F7/00 ,  G06F12/00 ,  G06F9/28

CPC classification number: B60W60/0015 ,  B60W50/00 ,  G05B13/027 ,  G06F7/00 ,  G06F9/28 ,  G06F9/3004 ,  G06F9/30069 ,  G06F9/30079 ,  G06F12/00 ,  G06N3/02 ,  G06T1/20 ,  B60W2420/403 ,  B60W2420/42 ,  B60W2420/52

Abstract: A neural processing unit (NPU) includes a controller including a scheduler, the controller configured to receive from a compiler a machine code of an artificial neural network (ANN) including a fusion ANN, the machine code including data locality information of the fusion ANN, and receive heterogeneous sensor data from a plurality of sensors corresponding to the fusion ANN; at least one processing element configured to perform fusion operations of the fusion ANN including a convolution operation and at least one special function operation; a special function unit (SFU) configured to perform a special function operation of the fusion ANN; and an on-chip memory configured to store operation data of the fusion ANN, wherein the schedular is configured to control the at least one processing element and the on-chip memory such that all operations of the fusion ANN are processed in a predetermined sequence according to the data locality information.

公开(公告)号：US11710026B2

公开(公告)日：2023-07-25

申请号：US17989761

申请日：2022-11-18

Applicant: DEEPX CO., LTD.

Inventor： Lok Won Kim

IPC: G06N3/02 ,  G06N5/04

CPC classification number: G06N3/02 ,  G06N5/04

Abstract: A computer-implemented apparatus installed and executed in a computer to search an optimal design of a neural processing unit (NPU), a hardware accelerator used for driving a computer-implemented artificial neural network (ANN) is disclosed. The NPU comprises a plurality of blocks connected in a form of pipeline, and the number of the plurality blocks and the number of the layers within each block of the plurality blocks are in need of optimization to reduce hardware resources demand and electricity power consumption of the ANN while maintaining the inference accuracy of the ANN at an acceptable level. The computer-implemented apparatus searches for and then outputs an optimal L value and an optimal C value when a first set of candidate values for a number of layers L and a second set of candidate values for a number of channels C per each layer of the ANN is provided.

公开(公告)号：US11429180B2

公开(公告)日：2022-08-30

申请号：US17366042

申请日：2021-07-02

Applicant: DEEPX CO., LTD.

Inventor： Lok Won Kim

IPC: G06F1/00 ,  G06F1/3287 ,  G06F1/3206 ,  G06K9/62 ,  G06N3/08

Abstract: A trained model creation method for performing a specific function for an electronic device includes preparing big data for training an artificial neural network and specific function performance determination data for determining whether to perform a specific function of an electronic device with respect to the sensing data; and preparing an artificial neural network model, which calculates inputs of the sensing data for the nodes of the input layer in order to output the specific function performance determination data from the nodes of the output layer. The artificial neural network model is trained by repeatedly performing a process of inputting the sensing data included in the prepared big data into the nodes of the input layer and outputting the specific function performance determination data that pairs with the sensing data included in the big data from the nodes of the output layer so as to update the association parameters.

公开(公告)号：US20220206068A1

公开(公告)日：2022-06-30

申请号：US17562979

申请日：2021-12-27

Applicant: DEEPX CO., LTD.

Inventor： Lok Won Kim

IPC: G01R31/317 ,  G06N3/02

Abstract: This disclosure proposes an inventive system capable of testing a component in the system during runtime. The system may comprise: a substrate; a plurality of functional components, of the plurality of functional components being mounted onto the substrate and including a circuitry; a system bus formed with electrically conductive pattern onto the substrate thereby allowing the plurality of functional components to communicate with each other; one or more wrappers, each of the one or more wrappers connected to one of the plurality of functional components; and an in-system component tester (ICT) configured to: select, as a component under test (CUT), at least one functional component, in an idle state, of the plurality of the functional components; and test, via the one or more test wrappers, the at least one functional component selected as the CUT.

公开(公告)号：US11263513B2

公开(公告)日：2022-03-01

申请号：US17254039

申请日：2020-02-21

Applicant: DEEPX CO., LTD.

Inventor： Lok Won Kim

IPC: G06N3/04 ,  G06N3/063 ,  G06N20/00

Abstract: The present disclosure provides a bit quantization method of an artificial neural network. This method may include: (a) of selecting one parameter or one parameter group to be quantized in the artificial neural network; (b) a bit quantizing to reduce the data representation size for the selected parameter or parameter group to a unit of bits; (c) of determining whether the accuracy of the artificial neural network is equal to or greater than a predetermined target value; and (d) repeating steps (a) to (c) when the accuracy of the artificial neural network is equal to or greater than the target value.