Abstract:
The present disclosure provides a pixel circuit including: a driving transistor and a voltage control circuit; wherein in the voltage control circuit, at least one transistor directly coupled to a gate of the driving transistor is an oxide thin film transistor. The disclosure also provides a display substrate and a display apparatus.
Abstract:
The present disclosure discloses a pixel circuit and a drive method thereof, and a display panel. The pixel circuit includes a drive transistor, a first light-emission control sub-circuit, a second light-emission control sub-circuit, a first threshold compensation sub-circuit, a second threshold compensation sub-circuit, a first initialization sub-circuit, a second initialization sub-circuit, a data-in sub-circuit, a capacitor, and a light-emitting element; wherein the second light-emission control sub-circuit is connected to the first light-emission control sub-circuit, a second initialization sub-circuit and a gate of the drive transistor, and is configured to send the signal of the first threshold compensation sub-circuit or the signal of the second threshold compensation sub-circuit to the gate of the drive transistor.
Abstract:
The embodiments of the disclosure disclose a display panel and a display device. The display panel includes a base substrate including a plurality of sub-pixels, at least one of the plurality of sub-pixels including a pixel circuit, wherein the pixel circuit includes a storage capacitor; a first conductive layer located on a side, lacing away from the base substrate, of a first insulating layer, the first conductive layer including a plurality of scanning wires; a second insulating layer located on a side, facing away from the base substrate, of the first conductive layer; a second conductive layer located on a side, facing away from the base substrate, of the second insulating layer; a fourth insulating layer located on a side, facing away from the base substrate, of the second conductive layer; and a third conductive layer located on a side, facing away from the base substrate, of the fourth insulating layer, the third conductive layer including a plurality of data wires arranged at intervals; where the storage capacitor includes three stacked electrode plates, and the three stacked electrode plates are respectively arranged on the same layer together with the first conductive layer, the second conductive layer and the third conductive layer.
Abstract:
The application discloses a wiring structure, a display substrate and a display device. The wiring structure provided includes a plurality of hollowed pattern strings, each hollowed pattern string including a plurality of hollowed patterns arranged sequentially in a length extension direction of the wiring structure, each hollowed pattern including a hollowed region and a non-hollowed region. The non-hollowed region of any hollowed pattern in a hollowed pattern string at least partially overlaps the non-hollowed region of a hollowed pattern in a further hollowed pattern string adjacent to the hollowed pattern string, and the hollowed regions of the hollowed patterns in the plurality of hollowed pattern strings do not overlap each other. The wiring structure is particularly adapted for flexible display.
Abstract:
A wiring structure, a display substrate and a display device. The wiring structure comprises a plurality of hollow patterns, and edges of the wiring structure along a length direction of the wiring structure extend in a straight line. The wiring structure can release stress through the hollow patterns so as to avoid breakage of the wiring structure, the display substrate, and the display device.
Abstract:
Embodiments of the present disclosure provide a display substrate, a manufacturing method thereof, and a display device. The display substrate includes: a display area; an edge area; a bent portion between the display area and the edge area, the edge area being bent at a predetermined angle towards a side facing away from a display surface of the display area by means of the bent portion; and a row driving circuit in the edge area.
Abstract:
Embodiments of the present disclosure provide a shift register unit and a driving method thereof, a gate driving circuit and a display apparatus. The shift register unit includes a reset signal sub-unit and a scan signal sub-unit. The reset signal sub-unit includes a first input module, a first output module, and a first control module. The scan signal sub-unit includes a second input module, a second output module, and a second control module. The first input module is connected with the first control module, the first output module, and a signal input terminal. Both the first output module and the first control are connected with the scan signal sub-unit and a reset signal terminal. The second input module is also connected with the second output module and the second control module. Both the second output module and the second control module are connected with a signal output terminal.
Abstract:
A display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes a base substrate, a second power line, a data signal line and a plurality of sub-pixels, wherein at least one sub-pixel includes a pixel driving circuit and a light emitting device connected to the pixel driving circuit; a semiconductor layer and a plurality of conducting layers, which are disposed at one side of the semiconductor layer away from the base substrate, are disposed on the base substrate, a first electrode is arranged in at least one conducting layer, the first electrode is connected to the second power line, and there is an overlapping area between an orthographic projection of the first electrode on the base substrate and an orthographic projection of the data signal line on the base substrate.
Abstract:
A shift register includes: a first input circuit, a first output circuit, a second input circuit, a second output circuit and at least one functional circuit. The first input circuit is configured to transmit an input signal to the first node under control of a first control signal. The first output circuit is configured to transmit a first output signal to the first scan signal terminal under control of the first node. The second input circuit is configured to transmit a first voltage signal to the second node under control of a second control signal. The second output circuit is configured to transmit a second output signal to the first scan signal terminal under control of the second node. A functional circuit is configured to block a path between the functional input terminal and the functional output terminal under control of a functional control signal.
Abstract:
A display substrate includes a substrate, and first active layers, a first functional layer, a second active layer, a second functional layer and an interlayer dielectric layer stacked in sequence on the substrate. The display substrate further includes first vias, second vias and third vias. The first vias each penetrate at least a portion of the second functional layer and at least a portion of the first functional layer, and each expose a partial surface of a first active layer. The second vias each penetrate the interlayer dielectric layer, and are respectively communicated with the first vias. The third vias each penetrate the interlayer dielectric layer and at least another portion of the second functional layer, and each expose a partial surface of the second active layer. The first vias are formed before the interlayer dielectric layer, and the third vias are formed later than the interlayer dielectric layer.