VARIABLE-GAIN AMPLIFIER CIRCUIT AND WIRELESS COMMUNICATION DEVICE INTEGRATED CIRCUIT EQUIPPED THEREWITH
    42.
    发明申请
    VARIABLE-GAIN AMPLIFIER CIRCUIT AND WIRELESS COMMUNICATION DEVICE INTEGRATED CIRCUIT EQUIPPED THEREWITH 有权
    可变增益放大器电路和无线通信设备集成电路

    公开(公告)号:US20100271122A1

    公开(公告)日:2010-10-28

    申请号:US12765010

    申请日:2010-04-22

    IPC分类号: H03G3/20

    CPC分类号: H03G3/3052

    摘要: There is disclosed a variable-gain amplifier circuit that operates on a low voltage, exhibits low distortion, provides a wide range of variation, and is suitable for use in a low-power-consumption wireless communication system. The variable-gain amplifier circuit is configured so that a variable-load circuit, which includes three reactance function elements and provides a wide range of impedance variation, is connected to a conductor circuit whose output terminal generates a positive-phase output current proportional to conductance with respect to an input voltage.

    摘要翻译: 公开了一种在低电压下操作的可变增益放大器电路,具有低失真,提供宽范围的变化,并且适用于低功耗无线通信系统。 可变增益放大器电路被配置为使得包括三个电抗功能元件并提供宽范围的阻抗变化的可变负载电路连接到其输出端产生与电导成比例的正相输出电流的导体电路 相对于输入电压。

    ANTI-TUMOR AGENT COMPRISING SULPHOSTIN OR SULPHOSTIN-RELATED COMPOUND AS THE ACTIVE INGREDIENT
    43.
    发明申请
    ANTI-TUMOR AGENT COMPRISING SULPHOSTIN OR SULPHOSTIN-RELATED COMPOUND AS THE ACTIVE INGREDIENT 审中-公开
    作为活性成分的包含硫蛋白或硫代磷酸相关化合物的抗肿瘤剂

    公开(公告)号:US20100179324A1

    公开(公告)日:2010-07-15

    申请号:US12685241

    申请日:2010-01-11

    IPC分类号: C07F9/06

    CPC分类号: C07D211/92

    摘要: An anti-tumor agent containing, as an active ingredient, at least one of a sulphostin-related compound represented by the following General Formula (I), a pharmacologically acceptable salt thereof and a hydrate thereof; and a pharmaceutical composition containing the anti-tumor agent: where n is an integer of 1 to 3.

    摘要翻译: 一种抗肿瘤剂,其含有下述通式(I)表示的磺酸钠相关化合物,其药理学可接受的盐及其水合物中的至少一种作为有效成分, 以及含有抗肿瘤剂的药物组合物,其中n为1〜3的整数。

    Semiconductor devices with inductors
    44.
    发明授权
    Semiconductor devices with inductors 有权
    具有电感器的半导体器件

    公开(公告)号:US07642618B2

    公开(公告)日:2010-01-05

    申请号:US11183800

    申请日:2005-07-19

    IPC分类号: H01L27/00 H01F27/28

    摘要: Semiconductor devices are provided with high performance high-frequency circuits in which interference caused by inductors is reduced. In a semiconductor device including a modulator circuit to modulate a carrier wave by a base band signal to output an RF signal and a demodulator circuit to demodulate the RF signal by use of the carrier wave to gain the base band signal and a local oscillator to generate the carrier wave, inductors respectively having a closed loop wire are adopted. Interference caused by mutual inductance is reduced by the closed loop wire. For example, where inductors are adopted in the modulator circuit, a closed loop wire is disposed around the outer periphery of the inductors.

    摘要翻译: 半导体器件设置有由电感器引起的干扰减小的高性能高频电路。 在包括通过基带信号调制载波以调制RF信号的调制器电路以及解调器电路的半导体器件中,通过使用载波来解调RF信号以获得基带信号和本地振荡器以产生 采用载波,分别具有闭环线的电感器。 通过闭环线减少互感造成的干扰。 例如,在调制器电路中采用电感器的情况下,围绕电感器的外周设置闭环线。

    Frequency generator and communication system
    45.
    发明授权
    Frequency generator and communication system 失效
    频率发生器和通讯系统

    公开(公告)号:US07091757B2

    公开(公告)日:2006-08-15

    申请号:US10893438

    申请日:2004-07-19

    申请人: Toru Masuda

    发明人: Toru Masuda

    IPC分类号: H03B19/00 H03B21/00

    CPC分类号: H03B19/00 H03D7/14

    摘要: The object of the invention is to provide a frequency generator which is composed of an oscillator and a frequency doubler and in which difference in amplitude between differential outputs of the frequency doubler can be equalized at low power consumption without adjustment. To achieve the object, the amplitude of differential outputs of the frequency doubler is detected and the delay time of a variable delay circuit is controlled. Owing to this configuration, in case a frequency of the oscillator varies or in case delay time by the delay circuit used in the frequency doubler varies by process variation and others even if the frequency is fixed, the amplitude of the differential outputs of the frequency doubler can be also equalized in the frequency generator.

    摘要翻译: 本发明的目的是提供一种由振荡器和倍频器组成的频率发生器,其中倍频器的差分输出之间的幅度差可以在低功耗下相等而不调整。 为了实现该目的,检测倍频器的差分输出的幅度,并且控制可变延迟电路的延迟时间。 由于这种配置,在振荡器的频率变化的情况下,或者即使频率固定,在倍频器中使用的延迟电路的延迟时间也随着工艺变动等而变化,倍频器的差分输出的幅度 也可以在频率发生器中均衡。

    Semiconductor devices with inductors
    46.
    发明申请
    Semiconductor devices with inductors 有权
    具有电感器的半导体器件

    公开(公告)号:US20060038621A1

    公开(公告)日:2006-02-23

    申请号:US11183800

    申请日:2005-07-19

    IPC分类号: H03J7/02

    摘要: Semiconductor devices provided with high performance high-frequency circuits that reduce interference caused by inductors are provided. In the semiconductor device including a modulator circuit to modulate a carrier wave by a base band signal to output an RF signal and a demodulator circuit to demodulate the RF signal by use of the carrier wave to gain the base band signal and a local oscillator to generate the carrier wave, inductors respectively having a closed loop wire are adopted. Interference caused by mutual inductance is reduced by the closed loop wire. For example, where inductors are adopted in the modulator circuit, a closed loop wire is disposed around the outer periphery of the inductors.

    摘要翻译: 提供了具有降低由电感器引起的干扰的高性能高频电路的半导体器件。 在包括通过基带信号调制载波以调制RF信号的调制器电路和解调器电路的半导体器件中,通过使用载波来解调RF信号以获得基带信号和本地振荡器以产生 采用载波,分别具有闭环线的电感器。 通过闭环线减少互感造成的干扰。 例如,在调制器电路中采用电感器的情况下,围绕电感器的外周设置闭环线。

    Optical receiver
    47.
    发明授权

    公开(公告)号:US06658217B2

    公开(公告)日:2003-12-02

    申请号:US09946450

    申请日:2001-09-06

    IPC分类号: H04B1006

    摘要: An optical receiver generates a voltage signal having a predetermined swing from a current signal, and feeds the voltage signal to a decision circuit. An optical receiving element receives the input optical signal, converts the optical signal to a current signal, and provides the current signal to a preamplifier, which converts the input current signal into a voltage signal. The voltage signal is input to an amplifier having a limiting function, which linearly amplifies the voltage signal when the swing of the voltage signal is smaller than a predetermined value, and limitedly amplifies the voltage signal when the voltage signal is greater than the predetermined value. An automatic-gain-control amplifier receives the output from the amplifier with the limiting function, and amplifies the input voltage signal to a voltage signal having a constant swing. The decision circuit receives the output of the automatic-gain-control amplifier and decides the binary nature of the voltage, and thus of the input optical signal.

    Semiconductor memory device having a controlled auxiliary decoder
    48.
    发明授权
    Semiconductor memory device having a controlled auxiliary decoder 失效
    具有受控辅助解码器的半导体存储器件

    公开(公告)号:US5402377A

    公开(公告)日:1995-03-28

    申请号:US243908

    申请日:1994-05-17

    IPC分类号: G11C29/00 G11C29/04 G11C8/00

    CPC分类号: G11C29/70

    摘要: A semiconductor memory device has a primary memory cell array, a primary decoder having a first circuit producing an intermediate signal from an address signal and a second circuit producing a first cell selection signal from the intermediate signal for selectively driving a word line and a bit line, an auxiliary memory cell array having a plurality of memory cells, each being used for a defective memory cell found in the primary memory cell array, an auxiliary decoder connected to the primary decoder to receive the intermediate signal, a non-volatile memory for storing first information indicating that the primary memory cell array contains a defective memory cell from which a cell defect signal is produced and for storing second information indicating an address of the defective memory cell from which a defective cell address signal is produced, and a control circuit responsive to the cell defect signal and the defective cell address signal for producing a first control signal to be supplied to the second circuit and a second control signal to be supplied to the auxiliary decoder. The primary decoder is prohibited by the first control signal from accessing a defective memory cell having an address represented by the defective cell address signal. The auxiliary decoder produces a second cell selection signal from the intermediate signal under control of the second control signal and of the cell defect signal for selectively accessing a memory cell in the auxiliary memory cell array.

    摘要翻译: 半导体存储器件具有主存储单元阵列,主解码器具有产生来自地址信号的中间信号的第一电路和从该中间信号产生第一单元选择信号的第二电路,用于选择性地驱动字线和位线 ,具有多个存储单元的辅助存储单元阵列,每个存储单元用于存储在主存储单元阵列中的缺陷存储单元,连接到主解码器以接收中间信号的辅助解码器,用于存储的非易失性存储器 指示主存储单元阵列包含产生单元缺陷信号的缺陷存储单元的第一信息,以及用于存储表示产生有缺陷单元地址信号的缺陷存储单元的地址的第二信息,以及响应于控制电路的控制电路 到单元缺陷信号和用于产生第一控制信号的有缺陷单元地址信号 提供给第二电路和第二控制信号以提供给辅助解码器。 主解码器被第一控制信号禁止访问具有由缺陷单元地址信号表示的地址的有缺陷的存储单元。 辅助解码器在第二控制信号和单元缺陷信号的控制下,从中间信号产生第二单元选择信号,用于选择性地访问辅助存储单元阵列中的存储单元。

    Jack with recessed contacts
    50.
    发明授权
    Jack with recessed contacts 失效
    杰克与凹陷的接触

    公开(公告)号:US4659167A

    公开(公告)日:1987-04-21

    申请号:US653105

    申请日:1984-09-21

    申请人: Toru Masuda

    发明人: Toru Masuda

    摘要: This invention relates to a jack with recessed contacts, wherein a contact collection plate is formed by punching a metal plate. The contact collection plate includes a plurality of contacts which are arranged in the lateral direction of the contact collection plate so that they do not overlap one another when the contact collection plate is viewed in development. The jack also has a contact holding member of electrical insulating material within which one end of each contact is recessed. The plurality of contacts are formed by bending each part which is to become a contact relative to the recessed end.

    摘要翻译: 本发明涉及具有凹入触点的插座,其中通过冲压金属板形成接触收集板。 接触收集板包括沿接触收集板的横向方向布置的多个触点,使得当在显影中观察接触收集板时它们不彼此重叠。 插座还具有电绝缘材料的接触保持构件,每个触点的一端凹入其中。 多个触点通过相对于凹入端弯曲成为接触的每个部分而形成。