Abstract:
The present invention provides a scan driving circuit utilized to drive cascading scan lines. The scan driving circuit comprises a pull-down control module, a pull-down module, a reset control module, a reset module, a lower transmission module, a first bootstrap capacitor, a constant low voltage source, and a constant high voltage source. By use of the deployment of the reset module, the scan driving circuit of the present invention improves the stability of the scan driving circuit and meanwhile, the structure of the whole scan driving circuit is simplified.
Abstract:
A testing circuit includes at least one sub-circuit. The sub-circuit includes a first input end, at least one second input end, at least one third input end, and at least one driving output end. The first switch unit includes controllable switches. The second switch unit includes sub-units and first inverters. The sub-unit includes transmission gates. The control end of the controllable switch connects to the second input end, the first end connects to the first input end, and the second end connects to the input end of the transmission gate. The first control end of the transmission gate connects to the third input end and the input end of the first inverter, the second control end connects to the output end of the first inverter, the output end connects to the driving output end.
Abstract:
A GOA circuit and a liquid crystal device (LCD) are disclosed. The GOA circuit includes a plurality of GOA units and a control module. Each of the cascaded GOA units is configured for charging corresponding horizontal scanning lines within a display area when being driven by a first level clock, a second level clock, a first control clock, and a second control clock. After the horizontal scanning lines are fully charged by the GOA circuit, the control module is configured for resetting the gate driving signals to be at the first level, i.e., the invalid level, via the turn-on pulse signals and the negative-voltage constant-voltage source.
Abstract:
A gate driving circuit is disclosed. The output circuit is connected with the input circuit and the pulling circuit at a first node, responding to scanning driving signal of previous stage to set the pulling circuit in a first status, using a first reference voltage level to set the first node at a first voltage, and held. The output circuit outputs scanning driving signal of current stage according to a first clock signal. The stabilizing circuit is connected with the pulling circuit at a second node, using the first reference voltage level to set the second node at the first voltage, and held. The pulling control circuit responds to a second clock signal to set the pulling circuit in a second status, using a second reference voltage level to pull voltages of the first and second nodes and to hold the voltages. Accordingly, a current leakage can be reduced.
Abstract:
A scanning-driving circuit and a liquid crystal display device are disclosed. The scanning-driving circuit has a forward-backward scanning module to output a forward and backward scanning-driving signals; a pull-up holding module connected to the forward-backward scanning module to receive a selecting signal of the forward-backward scanning module and to pull up a voltage level of a pull-down control signal node; an input module connected to the forward-backward scanning module and the pull-up holding module to receive a previous-stage clock signal and to charge a pull-up control signal node; a control module connected to the pull-up holding module to receive a present-stage clock signal and to control the pull-up holding module; an output module connected to the pull-up holding module and the control module to output a scanning-driving signal to a scanning line, and to transmit the scanning-driving signal to a pixel unit to ensure a stability of the scanning-driving circuit.
Abstract:
The invention provides a scanning driving circuit and a liquid crystal display apparatus. The scanning driving circuit including a latch module to receive and calculate an upper level control signal, a first and a second clock signal and a reset signal to get a first control signal, and latch and output the first control signal; a logic control module receive and calculate the first and the second control signal and the third clock signal to get a logic control signal, and output the logic control signal; an output module receive and calculate the logic control signal and the second control signal to get and output a scanning driving signal, and a scan line connected to the output module to transmit the scanning driving signal to a pixel unit and to achieve the special function of the liquid crystal display apparatus.
Abstract:
The present invention proposes a TFT, an array substrate, and a method of forming a TFT. The TFT includes a substrate, a buffer layer, a patterned poly-si layer, an isolation layer, a gate layer, and a source/drain pattern layer. The poly-si layer includes a heavily doped source and a heavily doped drain, and a channel. The gate layer includes a first gate area and a second gate area. The source/drain pattern layer includes a source pattern, a drain pattern and a bridge pattern, with the source pattern electrically connecting the heavily doped source, the drain pattern electrically connecting the heavily doped drain, and one end of the bridge pattern connecting the first gate area and the second gate area. The driving ability of the present inventive TFT is enhanced without affecting the leakage current.
Abstract:
A scan driving circuit is provided for driving scan lines which are connected in series, including a pull-down controlling module, a pull-down module, a reset-controlling module, a resetting module, a downward-transmitting module, a first bootstrap capacitor, a constant low voltage level source, and a constant high voltage level source. The entire structure of the scan driving circuit is simple, and energy consumption is reduced.
Abstract:
The present invention discloses a liquid crystal driving circuit, comprising the first to fifth electric switches and the first to fourth capacitors. The first and second capacitors are in the main area, and the third and fourth capacitors are in the sub area. The first to third capacitors are coupled in series. The first and second capacitors, the third and fourth capacitors are respectively coupled in parallel between the first and second electric switches and the common voltage end. The fourth and fifth electric switches are coupled in series between the data end and the second electric switch. The first to fourth electric switches are controlled with the gate control end. The data end is respectively coupled to the first, second and fourth electric switches.
Abstract:
A driving method of a display panel is provided, including setting the first red, first green, first blue, second red, second green, and second blue multiplexed signals. In the 2i−1th multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is earlier than that controlled by the second red, the second green, and the second blue multiplexed signals. While In the 2ith multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is later than that controlled by the second red, the second green, and the second blue multiplexed signals. The method will eliminate the stripe feeling of the scream picture displayed on the display panel and so improve the display quality.