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公开(公告)号：US20200321475A1
公开(公告)日：2020-10-08
申请号：US16308814
申请日：2018-09-22
Inventor： Xin Zhang , Juncheng Xiao , Haifeng Chen , Haijun Tian , Yanqing Guan , Chao Tian
IPC: H01L29/786 , H01L27/12 , H01L21/265 , H01L29/66
Abstract: A manufacturing method for LTPS TFT substrate is disclosed. Through performing two etchings on the gate metal layer, ion heavy doping and ion light doping of the polysilicon active layer are performed in a self-aligned manner such that the LDD structure of the polysilicon active layer is symmetrically distributed on two sides of the gate electrode, which is beneficial to improve device characteristics, is more stable and reliable than the conventional technology, and can reduce the number of process masks, save mask cost, operation cost, material cost and the time cost. The thinning process of the gate insulation layer can reduce the thickness of the gate insulation layer corresponding to the heavily doped region of the polysilicon active layer, so that the ion implantation efficiency can be effectively improved.
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公开(公告)号：US10714044B1
公开(公告)日：2020-07-14
申请号：US16349625
申请日：2018-10-10
Inventor： Xin Zhang , Juncheng Xiao , Yanqing Guan , Chao Tian
IPC: G09G3/36
Abstract: A gate driver of array (GOA) circuit and a display device are disclosed. An n-th sub-circuit in the GOA circuit includes a control module, an output module, a pull-up supplement module, and a leakage switch. The pull-up supplement module includes a supplement switch and an auxiliary switch. The supplement switch is coupled to the auxiliary switch, the control module, and the output module. The auxiliary switch is coupled to the supplement switch, the control module, and the output module. The leakage switch is coupled to the control module, the output module, the supplement switch, and the auxiliary switch.
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公开(公告)号：US10685593B2
公开(公告)日：2020-06-16
申请号：US16342209
申请日：2018-09-11
Inventor： Xin Zhang , Juncheng Xiao , Yanqing Guan , Chao Tian
IPC: G09G3/20
Abstract: A pixel driving circuit is provided. The pixel driving circuit comprises a reset module, a compensation module and light emitting module, wherein the reset module is configured to transmit a data signal to the compensation module to reset the compensation module under controlling of a first driving signal, the compensation module is configured to write the data signal to compensate a threshold voltage under controlling of a second driving signal, and the light emitting module is configured to emit light under controlling of a third driving signal.
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公开(公告)号：US12136396B2
公开(公告)日：2024-11-05
申请号：US17430058
申请日：2021-06-08
Inventor： Chao Tian , Yanqing Guan , Guanghui Liu , Fei Ai
IPC: G09G3/3266 , G09G3/20 , G09G3/36
Abstract: The present application provides a display panel and a display device. An N-th auxiliary unit is arranged in a display area of the display panel. An output end of the N-th auxiliary unit is connected to an N-th scan line. By connecting the auxiliary unit arranged in the display area to the corresponding scan line, a falling edge of a scan signal transmitted in the scan line can have sharp falling or a rising edge of the scan signal can have sharp rising, which can alleviate a signal distortion problem caused by transmission delay in the display area.
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公开(公告)号：US12087223B2
公开(公告)日：2024-09-10
申请号：US17772186
申请日：2022-04-15
Inventor： Xuebin Yuan , Chao Tian
IPC: G09G3/3233 , G09G3/32
CPC classification number: G09G3/3233 , G09G3/32 , G09G2300/0842 , G09G2310/0262 , G09G2310/08 , G09G2330/021
Abstract: The present disclosure discloses a pixel circuit and a display panel. The pixel circuit includes a light emitting module and a driving module including at least two driving units connected in parallel. a quantity of displayable gray scales can be improved or increased by configuring at least two driving units connected in parallel in the driving module where the at least two driving units can each correspondingly configure a light emitting current so that a plurality of light emitting brightness of the light emitting module can be implemented by a sum of these light emitting currents.
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Patent Agency Ranking
公开(公告)号：US12033553B2
公开(公告)日：2024-07-09
申请号：US17605043
申请日：2021-06-01
Inventor： Chao Tian
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2300/0408 , G09G2310/0267
Abstract: A display panel integrated with a gate driving circuit in a display area is provided. In the display panel, gate driving signal lines and data lines are not arranged side by side between any same adjacent two columns of sub-pixels. This avoids possibility of arranging the data lines and the gate driving signal lines side by side between any same adjacent two columns of sub-pixels, prevents the data lines from being easily disturbed by a parasitic capacitance generated between the data lines and the gate driving signal lines, and also avoids abnormal images on the display panel.
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公开(公告)号：US12020614B2
公开(公告)日：2024-06-25
申请号：US17441303
申请日：2021-08-06
Inventor： Haiming Cao , Chao Tian , Yanqing Guan , Fei Ai , Guanghui Liu
IPC: G09G3/3266 , G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/08 , G09G2320/045
Abstract: A gate drive circuit and a display panel are provided. A pull-up module and a pull-down module of the gate drive circuit output a constant-voltage high potential to a second node, a third node, and a n-th stage gate drive signal through a P-type thin film transistor and output constant-voltage low potential through a N-type thin film transistor to the second node, the third node, and an n-th gate drive signal, thereby improving the stability of the output signal of the thin film transistor connected to the gate drive circuit and the key node.
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公开(公告)号：US11996062B2
公开(公告)日：2024-05-28
申请号：US17419876
申请日：2021-05-31
Inventor： Yanqing Guan , Chao Tian , Haiming Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0876
Abstract: A display panel and a gate driving circuit are provided. The gate driving circuit utilizes the pull-down control module to periodically pull up and pull down the voltage level of the second node. The voltage level of the second node is periodically a high voltage level. This effectively reduces the time duration when the second node corresponds to the high voltage level. After the TFTs electrically connected to the second node are forward biased, the TFTs could have sufficient recovery time. This solution effectively improves the bias condition of the TFTs in the pull-down control module and thus makes the circuit more stable and raises the reliability of the circuit.
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公开(公告)号：US11961490B2
公开(公告)日：2024-04-16
申请号：US16971483
申请日：2020-07-21
Inventor： Chao Tian , Yanqing Guan
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2310/0283 , G09G2310/0289 , G09G2310/08 , G09G2320/0214
Abstract: Disclosed is a driving circuit, a display panel and a display device. The driving circuit includes a plurality of cascaded driving units, where a first staged driving unit includes a forward and backward scan control module, a node signal control module, an output control module, a first voltage stabilizing module, a first pull-down module, a second pull-down module and an electrical leakage control module. The electrical leakage control module is configured to maintain a voltage level of an output signal of the forward and backward scan control module.
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公开(公告)号：US11201247B2
公开(公告)日：2021-12-14
申请号：US16942800
申请日：2020-07-30
Inventor： Juncheng Xiao , Chao Tian
IPC: H01L29/786 , H01L29/66 , H01L27/12
Abstract: The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.
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