公开(公告)号：US11669957B2

公开(公告)日：2023-06-06

申请号：US17377746

申请日：2021-07-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Peng-Ren Chen ,  Yi-An Huang ,  Jyun-Hong Chen ,  Wei-Chung Hu ,  Wen-Hao Cheng ,  Shiang-Bau Wang ,  Yung-Jung Chang

IPC: G06T7/00 ,  G06V10/75

CPC classification number: G06T7/001 ,  G06V10/752 ,  G06T2207/10061 ,  G06T2207/30148 ,  G06V2201/06

Abstract: A method of analyzing a semiconductor wafer includes obtaining a graphic data system (GDS) file corresponding to the semiconductor wafer, using GDS information from the GDS file to provide coordinates of a layout feature of the semiconductor wafer to an electron microscope, using the electron microscope to capture a raw image from the semiconductor wafer based on the coordinates of the layout feature, and performing a measurement operation on the raw image.

公开(公告)号：US11469198B2

公开(公告)日：2022-10-11

申请号：US16353425

申请日：2019-03-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Ming-Ho Tsai ,  Jyun-Hong Chen ,  Chun-Chen Liu ,  Yu-Nu Hsu ,  Peng-Ren Chen ,  Wen-Hao Cheng ,  Chi-Ming Tsai

IPC: H01L23/48 ,  H01L23/00

Abstract: A semiconductor device manufacturing method including: simultaneously forming a plurality of conductive bumps respectively on a plurality of formation sites by adjusting a forming factor in accordance with an environmental density associated with each formation site; wherein the plurality of conductive bumps including an inter-bump height uniformity smaller than a value, and the environmental density is determined by a number of neighboring formation sites around each formation site in a predetermined range.

公开(公告)号：US10025175B2

公开(公告)日：2018-07-17

申请号：US14536031

申请日：2014-11-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chi-Ming Tsai ,  Chih-Chiang Tu ,  Wen-Hao Cheng ,  Ru-Gun Liu ,  Shuo-Yen Chou

IPC: G06F17/50 ,  G03F1/36 ,  G03F1/78

Abstract: A system and method that includes receiving a layout of an integrated circuit (IC) device. A template library is provided having a plurality of parameterized shape elements. A curvilinear feature of layout is classified by selecting at least one of the parameterized shape elements that defines the curvilinear feature. A template index is associated with the layout is formed that includes the selected parameterized shape element. The template index and the layout can be delivered to a mask writer, which uses the template index and the layout to fabricate a pattern on a photomask.

公开(公告)号：US20180017880A1

公开(公告)日：2018-01-18

申请号：US15718396

申请日：2017-09-28

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chue San Yoo ,  Ching-Yueh Chen ,  Wen-Hao Cheng

IPC: G03F7/20

CPC classification number: G03F7/70916 ,  G03F7/707 ,  G03F7/70875 ,  H01L21/67115 ,  H01L21/67253

Abstract: An apparatus for generating at least one particle shield in photolithography includes a first component and a second component. The first component and the second component are operable to form a first particle shield of the at least one particle shield for blocking particles from contacting a proximate surface of an object. The first component includes a first gas injector, and the second component includes a first gas extractor corresponding to the first gas injector. The first gas injector is configured to blow out a gas, thereby forming the first particle shield. The first gas extractor is configured to work with the first gas injector for providing gas pressure gradient for the first particle shield.