公开(公告)号：US08824209B2

公开(公告)日：2014-09-02

申请号：US13836212

申请日：2013-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doogon Kim ,  Sunil Shim ,  Hansoo Kim ,  Wonseok Cho ,  Jaehoon Jang ,  Jaehun Jeong

IPC: G11C16/04 ,  H01L27/115 ,  H01L29/66 ,  G11C16/10 ,  H01L29/788

CPC classification number: G11C16/10 ,  G11C16/0483 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L29/66825 ,  H01L29/7881

Abstract: Provided is a method of operating a non-volatile memory device. The method includes applying a turn-on voltage to each of first and second string select transistors of a first NAND string, applying first and second voltages to third and fourth string select transistors of a second NAND string, respectively, and applying a high voltage to word lines connected with memory cells of the first and second NAND strings.

Abstract translation: 提供了一种操作非易失性存储器件的方法。 该方法包括对第一NAND串的第一和第二串选择晶体管中的每一个施加导通电压，将第一和第二电压分别施加到第二NAND串的第三和第四串选择晶体管，并将高电压施加到 与第一和第二NAND串的存储单元相连的字线。

公开(公告)号：US08637920B2

公开(公告)日：2014-01-28

申请号：US13684857

申请日：2012-11-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunil Shim ,  Jaehun Jeong ,  Hansoo Kim ,  Sunghoi Hur ,  Jaehoon Jang ,  Su-Youn Yi

IPC: H01L29/792 ,  H01L29/66

CPC classification number: H01L27/0207 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7926

Abstract: Provided is a semiconductor memory device. In the semiconductor memory device, a lower selection gate controls a first channel region that is defined at a semiconductor substrate and a second channel region that is defined at the lower portion of an active pattern disposed on the semiconductor substrate. The first threshold voltage of the first channel region is different from the second threshold voltage of the second channel region.

Abstract translation: 提供了一种半导体存储器件。 在半导体存储器件中，下部选择栅极控制限定在半导体衬底上的第一沟道区和限定在设置在半导体衬底上的有源图案的下部的第二沟道区。 第一沟道区的第一阈值电压不同于第二沟道区的第二阈值电压。